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luke
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OpenRAM
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https://github.com/VLSIDA/OpenRAM.git
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2026-09-03 16:31:08 +02:00
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8b6a28b6fd6cf0153b7bbc6ab0519119dbf375f9
OpenRAM
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technology
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scn4m_subm
T
History
Hunter Nichols
8b6a28b6fd
Changed scmos bitcell 1rw,1r to have same tx widths as pbitcell.
2018-11-13 22:24:18 -08:00
..
gds_lib
Changed scmos bitcell 1rw,1r to have same tx widths as pbitcell.
2018-11-13 22:24:18 -08:00
mag_lib
Changed scmos bitcell 1rw,1r to have same tx widths as pbitcell.
2018-11-13 22:24:18 -08:00
models
Added scn4m_subm.
2018-09-13 12:53:35 -07:00
sp_lib
Changed scmos bitcell 1rw,1r to have same tx widths as pbitcell.
2018-11-13 22:24:18 -08:00
sue_lib
Added scn4m_subm.
2018-09-13 12:53:35 -07:00
tech
Added sense amp enable delay calculation.
2018-11-08 23:54:18 -08:00
tf
Supply router working except:
2018-09-18 12:57:39 -07:00
