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mirror of https://github.com/VLSIDA/OpenRAM.git synced 2026-08-29 09:30:38 +02:00
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8b6a28b6fd6cf0153b7bbc6ab0519119dbf375f9
OpenRAM/technology
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Hunter Nichols 8b6a28b6fd Changed scmos bitcell 1rw,1r to have same tx widths as pbitcell.
2018-11-13 22:24:18 -08:00
..
freepdk45
Merged with dev. Fixed merge conflict.
2018-11-09 17:18:19 -08:00
scn3me_subm
Fixed spacing in golden lib files. Added column mux into analytical model.
2018-10-24 00:16:26 -07:00
scn4m_subm
Changed scmos bitcell 1rw,1r to have same tx widths as pbitcell.
2018-11-13 22:24:18 -08:00
setup_scripts
Added scn4m_subm.
2018-09-13 12:53:35 -07:00
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