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base
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Merged dev and fix conflicts in geometry.py
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2018-10-24 10:52:22 -07:00 |
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bitcells
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Merged dev and fix conflicts in geometry.py
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2018-10-24 10:52:22 -07:00 |
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characterizer
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Fix check for missing simulator type in characterizer
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2018-10-25 09:08:56 -07:00 |
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datasheet
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moved css into a seperate file to organize and disambiguate docstrings from multiline strings
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2018-10-20 14:14:01 -07:00 |
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drc
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Moving wide metal spacing to routing grid level
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2018-10-15 09:59:16 -07:00 |
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gdsMill
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Fixed merge conflicts with sram.py
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2018-10-22 17:29:14 -07:00 |
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modules
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Merged dev and fix conflicts in geometry.py
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2018-10-24 10:52:22 -07:00 |
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pgates
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Merge branch 'dev' into supply_routing
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2018-10-17 09:47:18 -07:00 |
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router
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Change non-preferred route costs.
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2018-10-20 14:47:24 -07:00 |
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tests
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Run delay and setup/hold tests in netlist_only mode
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2018-10-25 09:07:00 -07:00 |
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verify
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Remove old setup.tcl and edit one in tech dir
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2018-10-20 15:20:15 -07:00 |
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Makefile
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debug.py
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example_config_freepdk45.py
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Fixed lib files to be syntactically correct with multiport. Fixed issue in geometry.py that prevented netlist_only option from working.
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2018-10-22 23:33:01 -07:00 |
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example_config_scn4m_subm.py
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Fixed multiport lib files not generating the correct number of signals. Move setup time from DOUT to DIN in lib file. Altered golden files with these changes.
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2018-10-24 00:17:08 -07:00 |
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gen_stimulus.py
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globals.py
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Fixed merge conflicts with sram.py
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2018-10-22 17:29:14 -07:00 |
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openram.py
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Merge branch 'dev' into supply_routing
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2018-10-20 14:29:19 -07:00 |
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options.py
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sram.py
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Fixed merge conflicts with sram.py
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2018-10-22 17:29:14 -07:00 |
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sram_1bank.py
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Merge branch 'multiport' into supply_routing
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2018-10-11 09:56:38 -07:00 |
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sram_2bank.py
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sram_4bank.py
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sram_base.py
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Fixed spacing in golden lib files. Added column mux into analytical model.
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2018-10-24 00:16:26 -07:00 |
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sram_config.py
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Added custom 1rw+1r bitcell. Testing are currently failing.
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2018-10-22 17:02:21 -07:00 |
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