OpenRAM/compiler/base
Hunter Nichols 53cb4e7f5e Fixed lib files to be syntactically correct with multiport. Fixed issue in geometry.py that prevented netlist_only option from working. 2018-10-22 23:33:01 -07:00
..
contact.py
design.py Merge branch 'dev' into supply_routing 2018-10-17 09:47:18 -07:00
geometry.py Fixed lib files to be syntactically correct with multiport. Fixed issue in geometry.py that prevented netlist_only option from working. 2018-10-22 23:33:01 -07:00
hierarchy_design.py
hierarchy_layout.py Supply router working except for off by one rail via error 2018-10-19 14:21:03 -07:00
hierarchy_spice.py Fix print check regression 2018-10-15 13:23:31 -07:00
lef.py
path.py
pin_layout.py
route.py
utils.py Added custom 1rw+1r bitcell. Testing are currently failing. 2018-10-22 17:02:21 -07:00
vector.py
verilog.py
wire.py