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mirror of https://github.com/VLSIDA/OpenRAM.git synced 2026-08-31 18:25:18 +02:00
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33c17ac41c847c3bc5a48467583e86b8d71ee255
OpenRAM/technology/scn4m_subm
T
History
Hunter Nichols 33c17ac41c Moved manual delay chain declarations from tech files to options.
2019-06-25 15:45:02 -07:00
..
gds_lib
Well contact cleanup for SCMOS TSMC 0.35
2019-04-26 10:19:11 -07:00
mag_lib
Use local setup.tcl and flatten bitcell arrays.
2019-04-26 14:12:51 -07:00
models
Added scn4m_subm.
2018-09-13 12:53:35 -07:00
sp_lib
Copy 1rw/1r cell to 1w/1r.
2019-02-24 09:54:45 -08:00
sue_lib
Added scn4m_subm.
2018-09-13 12:53:35 -07:00
tech
Moved manual delay chain declarations from tech files to options.
2019-06-25 15:45:02 -07:00
tf
Remove file named LICENSE since it is in the README for the tech files
2019-01-25 15:58:49 -08:00
__init__.py
Update copyright to correct years.
2019-05-06 06:50:15 -07:00
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