Logo
Explore Help
Sign In
luke/OpenRAM
Watch 1
Star 0
Fork 0
mirror of https://github.com/VLSIDA/OpenRAM.git synced 2026-08-29 09:30:38 +02:00
Code Issues Packages Projects Releases Wiki Activity
Files
20d4e390f6ac35859dd2eac76c791d799b8ccfec
OpenRAM/compiler/router
T
History
Matt Guthaus 2694ee1a4c Add all insufficient grids that overlap the pin at all
2018-11-19 15:43:19 -08:00
..
tests
Fix print check regression
2018-10-15 13:23:31 -07:00
direction.py
Remove diagonal routing bug. Cleanup.
2018-11-02 14:57:40 -07:00
grid_cell.py
Remove diagonal routing bug. Cleanup.
2018-11-02 14:57:40 -07:00
grid_path.py
Remove diagonal routing bug. Cleanup.
2018-11-02 14:57:40 -07:00
grid_utils.py
Add expanded blockages for paths an enclosures to handle wide metal spacing rules.
2018-11-02 11:11:32 -07:00
grid.py
Supply router working except for off by one rail via error
2018-10-19 14:21:03 -07:00
pin_group.py
Add new bbox routine for pin enclosures
2018-11-19 09:28:29 -08:00
router_tech.py
Pad the routing grid by a few tracks to add an extra rail
2018-11-02 17:35:35 -07:00
router.py
Add all insufficient grids that overlap the pin at all
2018-11-19 15:43:19 -08:00
signal_grid.py
Rewrote pin enclosure code to better address off grid pins.
2018-10-10 15:15:58 -07:00
signal_router.py
Change non-preferred route costs.
2018-10-20 14:47:24 -07:00
supply_grid.py
Supply router working except:
2018-09-18 12:57:39 -07:00
supply_router.py
Fix run-time bug in combine adjacent pins for supply router
2018-11-14 17:06:12 -08:00
vector3d.py
Add remove adjacent feature for wide metal spacing
2018-10-30 12:24:13 -07:00
Powered by Gitea Version: 1.27.2 Page: 165ms Template: 17ms
Auto
English
Bahasa Indonesia Deutsch English Español Français Gaeilge Italiano Latviešu Magyar nyelv Nederlands Polski Português de Portugal Português do Brasil Suomi Svenska Türkçe Čeština Ελληνικά Български Русский Українська فارسی മലയാളം 日本語 简体中文 繁體中文(台灣) 繁體中文(香港) 한국어
Licenses API