OpenRAM/compiler
Michael Timothy Grimes 1ba626fce1 removed pbitcell for compiler folder 2018-02-28 11:28:04 -08:00
..
base Move utils to base. 2018-02-09 10:42:23 -08:00
characterizer Add extra comments in stimulus output. 2018-02-26 14:39:06 -08:00
gdsMill Ignore non-rectangular pins. 2018-02-16 10:24:57 -08:00
modules Change RBL to allow stages and FO for configuration 2018-02-16 11:51:01 -08:00
pgates moved pbitcell to new folder for parametrically sized cells 2018-02-28 11:25:22 -08:00
router Fix unit tests to be DRC clean. 2017-06-07 10:29:53 -07:00
tests The bitcell currently passes DRC and LVS for FreePDK45 and SCMOS 2018-02-28 11:14:53 -08:00
verify Change priority of debug info for DRC/LVS. 2018-02-25 11:14:31 -08:00
Makefile Add Makefile for parallel test execution. 2018-01-22 13:39:07 -08:00
debug.py Clean up messages. 2018-01-31 11:54:20 -08:00
example_config_freepdk45.py Fix num words in example. 2018-02-23 12:17:43 -08:00
example_config_scn3me_subm.py Example config only characterizes a single corner. Remove default name of sram to generate more meaningful name. Begin pre-computed IP library. 2018-02-12 11:22:47 -08:00
gen_stimulus.py Add utility script gen_stimulus.py to help create simulations for debugging. 2018-02-26 08:54:35 -08:00
globals.py Add utility script gen_stimulus.py to help create simulations for debugging. 2018-02-26 08:54:35 -08:00
openram.py Add utility script gen_stimulus.py to help create simulations for debugging. 2018-02-26 08:54:35 -08:00
options.py Add new DFF. Create DFF module. Start dff_array, not tested. 2018-02-14 15:16:28 -08:00
regress.sh Add regress.sh script for convenience 2016-11-18 08:00:34 -08:00
sram.py Begin modifications for corner-based characterization. Made stimuli.py a class. Golden output files are not updated. 2018-02-09 15:33:03 -08:00