Michael Timothy Grimes 17769f27c6 small changes to pbitcell

2018-05-22 14:51:42 -07:00

..

base

Add dffs to control logic. Rename layout pin segment/rect functions for consistency. Redo gnd/vdd pins in control.

2018-03-23 08:14:09 -07:00

characterizer

Fixed accidental changes made to analytical delay.

2018-02-28 12:18:41 -08:00

gdsMill

Ignore non-rectangular pins.

2018-02-16 10:24:57 -08:00

modules

changed case of handmade bitcell pins from upper case to lower case. Made changes in other modules that are affected by this case. Only for SCMOS for this commit

2018-05-22 14:16:51 -07:00

pgates

small changes to pbitcell

2018-05-22 14:51:42 -07:00

router

Fix unit tests to be DRC clean.

2017-06-07 10:29:53 -07:00

tests

Merging branch with PrivateRAM dev

2018-05-18 15:15:31 -07:00

verify

Change lvs check to look only at the last/top module.

2018-04-20 15:46:12 -07:00

debug.py

Clean up messages.

2018-02-02 12:31:33 -08:00

example_config_freepdk45.py

Fix num words in example.

2018-02-23 12:17:43 -08:00

example_config_scn3me_subm.py

Example config only characterizes a single corner. Remove default name of sram to generate more meaningful name. Begin pre-computed IP library.

2018-02-12 11:22:47 -08:00

gen_stimulus.py

Add utility script gen_stimulus.py to help create simulations for debugging.

2018-02-26 08:54:35 -08:00

globals.py

Commit local changes. Forgot what the status is.

2018-05-11 09:15:29 -07:00

Makefile

Add Makefile for parallel test execution.

2018-01-22 13:39:07 -08:00

openram.py

Add utility script gen_stimulus.py to help create simulations for debugging.

2018-02-26 08:54:35 -08:00

options.py

Merging branch with PrivateRAM dev

2018-05-18 15:15:31 -07:00

regress.sh

Add regress.sh script for convenience

2016-11-18 08:00:34 -08:00

sram.py

Commit local changes. Forgot what the status is.

2018-05-11 09:15:29 -07:00