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mirror of https://github.com/VLSIDA/OpenRAM.git synced 2026-08-29 17:39:02 +02:00
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14f440df7360f3b799b3ba1448fac9ccb580097e
OpenRAM/compiler/characterizer
T
History
David Ratchkov c2419af2e2 Fix voltage_map names (these do not need to match pg_pin names)
2020-04-22 09:03:22 -07:00
..
__init__.py
Removed unused characterization module.
2019-07-30 20:33:17 -07:00
bit_polarity.py
Clean up. Split class into own file.
2019-07-24 08:15:10 -07:00
charutils.py
Clean up. Split class into own file.
2019-07-24 08:15:10 -07:00
delay.py
- Fix disabled power char
2020-04-17 16:09:58 -07:00
functional.py
Feedthru port edits.
2019-09-27 14:18:49 -07:00
lib.py
Fix voltage_map names (these do not need to match pg_pin names)
2020-04-22 09:03:22 -07:00
logical_effort.py
Made all cin function relate to farads and all input_load relate to relative units.
2019-08-08 01:57:04 -07:00
measurements.py
Merged and fixed conflicts with dev
2019-06-25 16:55:50 -07:00
model_check.py
Merged and fixed conflicts with dev
2019-06-25 16:55:50 -07:00
setup_hold.py
Remove extra print
2019-11-17 10:40:01 -08:00
simulation.py
- Fix disabled power char
2020-04-17 16:09:58 -07:00
sram_op.py
Clean up. Split class into own file.
2019-07-24 08:15:10 -07:00
stimuli.py
Remove unused test structures
2019-09-06 14:58:47 -07:00
trim_spice.py
Fix space before comment
2019-06-14 08:43:41 -07:00
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