jsowash c1906ade3f Removed A pin's via connection since it's created in the SRAM level and rearranged the SRAM flip flop creation.

2019-08-29 14:48:13 -07:00

..

bank_select.py

Fix pnand2 height in bank select. Unsure how it passed before.

2019-07-03 15:12:22 -07:00

bank.py

Simplify is not None

2019-08-22 15:02:52 -07:00

bitcell_array.py

Replaced analytical characterization with graph implementation. Removed most analytical delay functions used by old chacterizer.

2019-08-08 02:33:51 -07:00

control_logic.py

Gate sen during first half period

2019-08-10 16:30:02 -07:00

delay_chain.py

Add direction to pins of all modules

2019-08-06 14:14:09 -07:00

dff_array.py

Removed all unused analytical delay functions.

2019-08-06 17:09:25 -07:00

dff_buf_array.py

Removed all unused analytical delay functions.

2019-08-06 17:09:25 -07:00

dff_buf.py

Removed all unused analytical delay functions.

2019-08-06 17:09:25 -07:00

dff_inv_array.py

Removed all unused analytical delay functions.

2019-08-06 17:09:25 -07:00

dff_inv.py

Removed all unused analytical delay functions.

2019-08-06 17:09:25 -07:00

dff.py

Removed all unused analytical delay functions.

2019-08-06 17:09:25 -07:00

dummy_array.py

Add direction to pins of all modules

2019-08-06 14:14:09 -07:00

hierarchical_decoder.py

Removed all unused analytical delay functions.

2019-08-06 17:09:25 -07:00

hierarchical_predecode2x4.py

Removed all unused analytical delay functions.

2019-08-06 17:09:25 -07:00

hierarchical_predecode3x8.py

Removed all unused analytical delay functions.

2019-08-06 17:09:25 -07:00

hierarchical_predecode.py

Add direction to pins of all modules

2019-08-06 14:14:09 -07:00

multibank.py

Fix capitalization in verilog golden files

2019-08-21 14:29:57 -07:00

port_address.py

Correct wordline_driver enable to en, not en_bar.

2019-07-05 10:31:05 -07:00

port_data.py

Merge branch 'add_wmask' into dev

2019-08-22 15:01:41 -07:00

precharge_array.py

Add direction to pins of all modules

2019-08-06 14:14:09 -07:00

replica_bitcell_array.py

Merge branch 'dev' into control_fix

2019-08-10 13:07:30 -07:00

replica_column.py

Add direction to pins of all modules

2019-08-06 14:14:09 -07:00

sense_amp_array.py

Replaced analytical characterization with graph implementation. Removed most analytical delay functions used by old chacterizer.

2019-08-08 02:33:51 -07:00

sense_amp.py

Uncommented tests that use model delays. Fixed issue in sense amp cin.

2019-08-08 18:26:12 -07:00

single_level_column_mux_array.py

Replaced analytical characterization with graph implementation. Removed most analytical delay functions used by old chacterizer.

2019-08-08 02:33:51 -07:00

tri_gate_array.py

Removed all unused analytical delay functions.

2019-08-06 17:09:25 -07:00

tri_gate.py

Made all cin function relate to farads and all input_load relate to relative units.

2019-08-08 01:57:04 -07:00

wordline_driver.py

Removed all unused analytical delay functions.

2019-08-06 17:09:25 -07:00

write_driver_array.py

Simplify is not None

2019-08-22 15:02:52 -07:00

write_driver.py

Merged and fixed conflicts with dev

2019-06-25 16:55:50 -07:00

write_mask_and_array.py

Removed A pin's via connection since it's created in the SRAM level and rearranged the SRAM flip flop creation.

2019-08-29 14:48:13 -07:00