OpenRAM

Commit Graph

Author	SHA1	Message	Date
Matt Guthaus	e17c69be3e	Clean up new code for add_modules, add_pins and netlist/layouts.	2018-08-28 10:24:09 -07:00
Matt Guthaus	6401cbf2a6	Move place function to instance class rather than hierarchy.	2018-08-27 17:25:39 -07:00
Matt Guthaus	8664f7a0b8	Converted all modules to not run create_layout when netlist_only mode is enabled.	2018-08-27 16:42:48 -07:00
Matt Guthaus	01cbc71a2a	Limit sizes for dff_buf too. Add comments about restriction.	2018-07-27 08:17:50 -07:00
Matt Guthaus	b541efe959	Fix wide gnd rail spacing to inverter NMOS by adding size limit to pinv.	2018-07-27 07:23:18 -07:00
Matt Guthaus	f34c4eb7dc	Convert entire OpenRAM to use python3. Works with Python 3.6. Major changes: Remove mpmath library and use numpy instead. Convert bytes to new bytearrays. Fix class name check for duplicate gds instances. Add explicit integer conversion from floats. Fix importlib reload from importlib library Fix new key/index syntax issues. Fix filter and map conversion to lists. Fix deprecation warnings. Fix Circuits vs Netlist in Magic LVS results. Fix file closing warnings.	2018-05-14 16:15:45 -07:00
Matt Guthaus	97c08bce95	Add dffs to control logic. Rename layout pin segment/rect functions for consistency. Redo gnd/vdd pins in control. Shift s_en buffers even with other cells.	2018-03-23 08:14:09 -07:00
Matt Guthaus	696433b1ec	Add bank_sel to bank_select module as input. Remove reference to control in sram. Add dff_buf_array to options. Added inverted DFF Add variable height pinvbuf	2018-03-23 08:13:39 -07:00

8 Commits