luke
/
OpenRAM
mirror of https://github.com/VLSIDA/OpenRAM.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

Fix wide gnd rail spacing to inverter NMOS by adding size limit to pinv.

This commit is contained in:
Matt Guthaus 2018-07-27 07:23:18 -07:00
parent 0e0516c4a6
commit b541efe959
1 changed files with 3 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
compiler/modules/dff_inv.py
View File

@ -12,7 +12,7 @@ class dff_inv(design.design):
do not have Qbar, so this will create it.
"""
def __init__(self, inv_size=1, name=""):
def __init__(self, inv_size=2, name=""):
if name=="":
name = "dff_inv_{0}".format(inv_size)
@ -25,6 +25,8 @@ class dff_inv(design.design):
self.dff = self.mod_dff("dff")
self.add_mod(self.dff)
debug.check(inv_size>=2, "Inverter must be greater than two for rail spacing DRC rules.")
self.inv1 = pinv(size=inv_size,height=self.dff.height)
self.add_mod(self.inv1)