7 Commits

Author	SHA1	Message	Date
Matt Guthaus	ffc866ef78	Single bank working except for channel routing error in 4-way case.	2018-07-17 14:40:04 -07:00
Matt Guthaus	7a69fc1bca	Add col addr routing and data routing	2018-07-17 14:24:44 -07:00
Matt Guthaus	ac22b1145f	Convert bank to use create_bus routines. ... Modify control logic to have correct offset in SRAM.	2018-07-16 14:13:41 -07:00
Matt Guthaus	f3ae29fe0b	Getting single bank to work reliably. Removed tri_gate from bank ... for now. Will add it in multibank arrays only. Not needed for separate DIN and DOUT ports.	2018-07-13 14:45:46 -07:00
Matt Guthaus	0c23efe49b	Reference local sram instance in sram.py.	2018-07-13 09:30:14 -07:00
Matt Guthaus	e6b1fcb44c	Refactor banks to use inheritance with a top-level SRAM wrapper class.	2018-07-12 10:30:45 -07:00
Matt Guthaus	d95a1925d4	Refactor banked SRAM into multiple files and dynamically load in SRAM	2018-07-10 14:17:09 -07:00