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OpenRAM
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4,011 Commits 4 Branches 63 Tags 78 MiB
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4011 Commits

Author SHA1 Message Date
mrg ff31990831 Add parallel build for dockerfile 2022-03-06 11:26:57 -08:00
mrg a0f1327f5e Add odd rows to 23_lib tests 2022-03-06 11:26:18 -08:00
mrg 6da3e44b6f Split up 06_hierarchical_decoder test 2022-03-06 11:26:03 -08:00
mrg 8c911f70b9 Build changes. 
Don't pull docker since it will be build by CI.
Shuffle tests to stagger technologies and test types.
 2022-03-06 10:31:43 -08:00
mrg d69e55c2e3 Power routing changes. 
Make the power rails an "experimental_power" option and conditional.
Rename route_vdd_gnd to route_supplies everywhere for consistency.
 2022-03-06 09:56:00 -08:00
mrg 8b3c10ae79 Improvements to power routing. 
Improved the route horizontal and vertical pin functions to
create a single pin at the end.
Swapped A and B on wordline driver input for cleaner routing
in most technologies.
Fixed vertical supply routing in port_address.
 2022-03-04 15:44:07 -08:00
mrg 10bec414e8 Update usage instructions 2022-03-04 14:21:58 -08:00
samuelkcrow 8bbe39f5d1 Merge branch 'char' of https://github.com/VLSIDA/PrivateRAM into char 2022-03-04 13:54:09 -08:00
samuelkcrow ef710eae7a reorder sram __init__() argument order for tests that rely on the order 2022-03-04 13:53:20 -08:00
samuelkcrow 043e93e75e call create() function from sram/__init__ 2022-03-04 13:47:09 -08:00
samuelkcrow b216552c3f clarify file location message for user 2022-03-04 13:47:09 -08:00
samuelkcrow a89cd4deee characterizer and functional simulator working from command line 2022-03-04 13:47:09 -08:00
samuelkcrow f9bec36da5 Adding characterizer executable 2022-03-04 13:47:09 -08:00
mrg 353ff7859c Initial work on separate delay and func simulation 2022-03-04 13:47:09 -08:00
mrg e139b4aa81 Swap A and B pins in wordline driver. 2022-03-03 09:53:24 -08:00
mrg 0533920777 Revert to old magic until substrate bug is fixed. 2022-03-03 09:49:20 -08:00
mrg ff471740ed Build docker from config instead of pulling it 2022-03-03 09:01:12 -08:00
mrg febf7031b1 Fix wrong power layer for min area constraint 2022-03-02 17:04:54 -08:00
mrg 7654cd7295 Allow supply pins on m4 too 2022-03-02 16:47:17 -08:00
samuelkcrow 1acc6be3ce call create() function from sram/__init__ 2022-03-02 16:38:39 -08:00
mrg 51ba88d896 Port address with vertical power stripes 2022-03-02 16:29:43 -08:00
samuelkcrow 910980328c clarify file location message for user 2022-03-02 12:47:05 -08:00
samuelkcrow d47b5612d5 characterizer and functional simulator working from command line 2022-03-02 12:18:54 -08:00
samuelkcrow a87b2e9446 Adding characterizer executable 2022-03-01 15:12:03 -08:00
mrg 4fac069c3c Skip hspice tests in docker 2022-03-01 14:44:04 -08:00
mrg f7e3672c89 Route horizontal supplies in write driver. 2022-03-01 14:37:51 -08:00
mrg 36bbf81624 Upgrade to magic 8.3.274 2022-03-01 14:37:30 -08:00
mrg 0908aa9e25 Add route vertical pins 2022-03-01 14:37:09 -08:00
mrg c12c006799 Add verbose option 2022-03-01 10:50:49 -08:00
mrg 38494458e3 Fix incorrect port 1w to 1r 2022-03-01 10:44:56 -08:00
mrg c223c1ad1c Run docker pull before running all tests for regression 2022-03-01 10:33:40 -08:00
mrg 184888b370 Skip 16 way test for now 2022-02-28 12:03:01 -08:00
mrg 27b4d2edb1 Add 16 way mux SRAM tests 2022-02-28 11:53:24 -08:00
mrg 54bd022efc Rework precharge route supply horizontally 2022-02-28 11:36:10 -08:00
mrg 8b4ef9b6c1 Upgrade to newest magic bug fixes 2022-02-28 09:11:09 -08:00
mrg 2520d9f590 Remove commented code in precharge array 2022-02-25 16:21:12 -08:00
mrg 9b90a44d4a Move output in freepdk45 sense amp down to prevent router conflict with supply 2022-02-25 16:20:47 -08:00
mrg 7b77378927 Add layer to horizontal pin help and use in precharge 2022-02-25 10:45:25 -08:00
mrg 12a6f1f2ee Add missing well tap 2022-02-25 10:44:40 -08:00
mrg 82c2bc329f Split bank and col mux tests. 2022-02-23 15:39:32 -08:00
mrg 5376b5bf20 Fix offset to center select signal between bitlines 2022-02-23 15:38:11 -08:00
mrg 6389d4ac82 Skip all func tests 2022-02-23 15:31:15 -08:00
mrg baf369fc96 Convert power to rails rather than pins in sense amp and precharge 2022-02-23 14:06:49 -08:00
mrg d4c14d7d19 Add horizontal pin helper function 2022-02-23 14:06:19 -08:00
mrg 5451a8d07a Don't make internal bus pins because magic will extract ports 2022-02-23 14:06:01 -08:00
mrg 6a295aeb38 Give feedback warnings in magic output 2022-02-23 13:05:03 -08:00
mrg 744dfc5fa7 Use older version of netgen 2022-02-23 13:04:53 -08:00
mrg 1742927751 Split port data tests into individual tests 2022-02-23 11:12:32 -08:00
mrg b71230efd7 Update Magic and klayout versions in docker 2022-02-23 10:20:18 -08:00
mrg 16d54e4fcb Use vlsida repo for sram library 2022-02-23 10:19:46 -08:00