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PEP8 updates

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This commit is contained in:
mrg
2020-03-31 10:15:46 -07:00
parent b0d2946c80
commit d916322b74
2 changed files with 30 additions and 37 deletions
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compiler/modules/write_driver_array.py
+15 -21
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@@ -5,21 +5,20 @@
# (acting for and on behalf of Oklahoma State University)
# All rights reserved.
#
from math import log
import design
from tech import drc
import debug
from sram_factory import factory
from vector import vector
from globals import OPTS
class write_driver_array(design.design):
"""
Array of tristate drivers to write to the bitlines through the column mux.
Dynamically generated write driver array of all bitlines.
"""
def __init__(self, name, columns, word_size,write_size=None):
def __init__(self, name, columns, word_size, write_size=None):
design.design.__init__(self, name)
debug.info(1, "Creating {0}".format(self.name))
self.add_comment("columns: {0}".format(columns))
@@ -31,7 +30,7 @@ class write_driver_array(design.design):
self.words_per_row = int(columns / word_size)
if self.write_size:
self.num_wmasks = int(self.word_size/self.write_size)
self.num_wmasks = int(self.word_size / self.write_size)
self.create_netlist()
if not OPTS.netlist_only:
@@ -97,9 +96,9 @@ class write_driver_array(design.design):
self.driver_insts = {}
w = 0
windex=0
for i in range(0,self.columns,self.words_per_row):
for i in range(0, self.columns, self.words_per_row):
name = "write_driver{}".format(i)
index = int(i/self.words_per_row)
index = int(i / self.words_per_row)
self.driver_insts[index]=self.add_inst(name=name,
mod=self.driver)
@@ -119,15 +118,14 @@ class write_driver_array(design.design):
self.get_br_name() + "_{0}".format(index),
self.en_name, "vdd", "gnd"])
def place_write_array(self):
from tech import cell_properties
if self.bitcell.width > self.driver.width:
self.driver_spacing = self.bitcell.width
else:
self.driver_spacing = self.driver.width
for i in range(0,self.columns,self.words_per_row):
index = int(i/self.words_per_row)
for i in range(0, self.columns, self.words_per_row):
index = int(i / self.words_per_row)
xoffset = i * self.driver_spacing
if cell_properties.bitcell.mirror.y and i % 2:
@@ -139,7 +137,6 @@ class write_driver_array(design.design):
base = vector(xoffset, 0)
self.driver_insts[index].place(offset=base, mirror=mirror)
def add_layout_pins(self):
for i in range(self.word_size):
inst = self.driver_insts[i]
@@ -166,16 +163,16 @@ class write_driver_array(design.design):
for n in ["vdd", "gnd"]:
pin_list = self.driver_insts[i].get_pins(n)
for pin in pin_list:
self.add_power_pin(name = n,
loc = pin.center(),
self.add_power_pin(name=n,
loc=pin.center(),
vertical=True,
start_layer = "m2")
start_layer="m2")
if self.write_size:
for bit in range(self.num_wmasks):
inst = self.driver_insts[bit*self.write_size]
inst = self.driver_insts[bit * self.write_size]
en_pin = inst.get_pin(inst.mod.en_name)
# Determine width of wmask modified en_pin with/without col mux
wmask_en_len = self.words_per_row*(self.write_size * self.driver_spacing)
wmask_en_len = self.words_per_row * (self.write_size * self.driver_spacing)
if (self.words_per_row == 1):
en_gap = self.driver_spacing - en_pin.width()
else:
@@ -184,19 +181,16 @@ class write_driver_array(design.design):
self.add_layout_pin(text=self.en_name + "_{0}".format(bit),
layer=en_pin.layer,
offset=en_pin.ll(),
width=wmask_en_len-en_gap,
width=wmask_en_len - en_gap,
height=en_pin.height())
else:
inst = self.driver_insts[0]
self.add_layout_pin(text=self.en_name,
layer="m1",
offset=inst.get_pin(inst.mod.en_name).ll().scale(0,1),
offset=inst.get_pin(inst.mod.en_name).ll().scale(0, 1),
width=self.width)
def get_w_en_cin(self):
"""Get the relative capacitance of all the enable connections in the bank"""
#The enable is connected to a nand2 for every row.
# The enable is connected to a nand2 for every row.
return self.driver.get_w_en_cin() * len(self.driver_insts)