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fix col_cap array for dummu compatability ...bitcells next

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This commit is contained in:
Jesse Cirimelli-Low
2025-03-06 02:05:43 -08:00
parent f3c1c5fbb2
commit 4ce6e0538b
7 changed files with 32 additions and 19 deletions
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technology/sky130/custom/sky130_col_cap.py
+15 -6
View File
@@ -8,20 +8,29 @@
from openram import debug
from openram.base import design
from openram.tech import cell_properties as props
from openram import OPTS
class sky130_col_cap(design):
def __init__(self, version, name=""):
def __init__(self, version, name="",left_rbl=[],right_rbl=[]):
if version == "colend":
cell_name = "sky130_fd_bd_sram__sram_sp_colend"
if OPTS.control_logic == "control_logic_delay" or not right_rbl:
cell_name = "sky130_fd_bd_sram__sram_sp_colend"
else:
cell_name = "sky130_fd_bd_sram__openram_sp_colend_replica"
prop = props.col_cap_1port_bitcell
elif version == "colenda":
if OPTS.control_logic == "control_logic_delay" or not left_rbl:
cell_name = "sky130_fd_bd_sram__sram_sp_colenda"
else:
cell_name = "sky130_fd_bd_sram__openram_sp_colenda_replica"
prop = props.col_cap_1port_bitcell
elif version == "colend_p_cent":
cell_name = "sky130_fd_bd_sram__sram_sp_colend_p_cent"
prop = props.col_cap_1port_strap_ground
elif version == "colenda":
cell_name = "sky130_fd_bd_sram__sram_sp_colenda"
prop = props.col_cap_1port_bitcell
elif version == "colenda_p_cent":
cell_name = "sky130_fd_bd_sram__sram_sp_colenda_p_cent"
prop = props.col_cap_1port_strap_ground
technology/sky130/custom/sky130_col_cap_array.py
+6 -4
View File
@@ -18,18 +18,20 @@ class sky130_col_cap_array(col_cap_array, sky130_bitcell_base_array):
"""
Generate a dummy row/column for the replica array.
"""
def __init__(self, rows, cols, column_offset=0, mirror=0, location="", name=""):
super().__init__(rows, cols, column_offset=column_offset, mirror=mirror, location=location, name=name)
def __init__(self, rows, cols, column_offset=0, mirror=0, location="", name="", left_rbl=[],right_rbl=[]):
self.left_rbl = left_rbl
self.right_rbl = right_rbl
super().__init__(rows, cols, column_offset=column_offset, mirror=mirror, location=location, name=name, left_rbl=left_rbl, right_rbl=right_rbl)
self.no_instances = False
def add_modules(self):
""" Add the modules used in this design """
if self.location == "top":
self.colend1 = factory.create(module_type="col_cap", version="colend")
self.colend1 = factory.create(module_type="col_cap", version="colend",left_rbl=self.left_rbl, right_rbl=self.right_rbl)
self.colend2 = factory.create(module_type="col_cap", version="colend_p_cent")
self.colend3 = factory.create(module_type="col_cap", version="colend_cent")
elif self.location == "bottom":
self.colend1 = factory.create(module_type="col_cap", version="colenda")
self.colend1 = factory.create(module_type="col_cap", version="colenda",left_rbl=self.left_rbl, right_rbl=self.right_rbl)
self.colend2 = factory.create(module_type="col_cap", version="colenda_p_cent")
self.colend3 = factory.create(module_type="col_cap", version="colenda_cent")
technology/sky130/tech/tech.py
+3 -1
View File
@@ -814,7 +814,9 @@ flatglob = ["*_?mos_m*",
blackbox_cells = ["sky130_fd_bd_sram__openram_dp_cell",
"sky130_fd_bd_sram__openram_dp_cell_dummy",
"sky130_fd_bd_sram__openram_dp_cell_replica",
"sky130_fd_bd_sram__openram_sp_colend_replica",
"sky130_fd_bd_sram__openram_sp_colenda_replica",
"sky130_fd_bd_sram__sram_sp_cell_opt1a",
"sky130_fd_bd_sram__openram_sp_cell_opt1a_dummy",
"sky130_fd_bd_sram__openram_sp_cell_opt1_dummy",