Commit Graph

2380 Commits

Author SHA1 Message Date
Krystine Sherwin 7f2f681e85
symfpu: Test comparisons 2026-03-11 12:58:58 +13:00
Krystine Sherwin 1f598c7383
tests/symfpu: Extra muladd tests
Switch inputs back to `anyseq`, and add coverage for muladd with constant multiplier output and varying addend (also an assertion).
Use an `ifdef` to control clocked properties (because of the assertion, it's no longer just covers that are clocked).
2026-03-11 12:58:57 +13:00
Krystine Sherwin 6333cf7bc9
tests/symfpu: Testing sqrt
Coverage supports `sqrt`, including new general rounding detection instead of just inf/ebmin/zero (since they aren't possible with `sqrt`).
More `sqrt` assertions, as well as the addition of `altsqrt` verification.
Some adjustments of macros.
2026-03-11 12:58:57 +13:00
Krystine Sherwin 1312668092
symfpu: Add altdiv 2026-03-11 12:58:56 +13:00
Krystine Sherwin 57e6baf287
tests/symfpu: Add cover checks
Include mask/map for abc inputs (and switch to `anyconst` instead of `anyseq`).
Add false divide check for mantissa.
Covers aren't currently being tested by anything (and have to be removed for `sat`), but I've been using it locally with SBY to confirm that the different edge cases are able to be verified (e.g. when verifying HardFloat against symfpu while using the masked inputs to reduce solver time).
2026-03-11 12:58:56 +13:00
Krystine Sherwin 6fd4bde7e6
Fix tininess when rounding to ebmin 2026-03-11 12:58:56 +13:00
Krystine Sherwin f0bfc87e27
tests/symfpu: UF to ebmin is valid 2026-03-11 12:58:55 +13:00
Krystine Sherwin b4186e2295
Don't raise DZ when left is inf 2026-03-11 12:58:55 +13:00
Krystine Sherwin 7b270a79c0
symfpu: Dynamic rounding mode 2026-03-11 12:58:55 +13:00
Krystine Sherwin cc4e9e52a8
symfpu: floatWithStatusFlags
Now with verified muladd exceptions.
2026-03-11 12:58:54 +13:00
Krystine Sherwin a0a0b2ce84
symfpu: Verifying rounding modes
Works for everything but muladd.
Which I saw coming, but am still frustrated by.
2026-03-11 12:58:54 +13:00
Krystine Sherwin cd28709b81
symfpu: Configurable rounding modes
Including tests, but currently only testing rounding modes on multiply.
Also missing the ...01 case.
2026-03-11 12:58:54 +13:00
Krystine Sherwin c1bc302174
symfpu: Add flags
Use symfpu fork.
Add tests for symfpu properties and extra edge case checking for flags.
2026-03-11 12:58:53 +13:00
Emil J 5f8489d36d
Merge pull request #5666 from YosysHQ/emil/equiv_induct-missing-model-errors
equiv_induct: error on missing model
2026-02-25 15:39:31 +01:00
Krystine Sherwin fd311c5501 tests/arch/gowin: Add wr_en test 2026-02-22 09:00:37 +01:00
Emil J 74f7b0cf92
Merge pull request #5685 from chathhorn-galois/chathhorn/issue5684
Fix segfault from shift with 0-width signed arg.
2026-02-20 11:53:05 +01:00
Emil J 53509a9b2a
Merge pull request #5692 from YosysHQ/emil/modtools-fix-db-port-deletion
modtools: fix database sanity
2026-02-20 10:49:28 +01:00
Emil J. Tywoniak abc7563a35 modtools: add ModIndex unit test 2026-02-18 22:15:44 +01:00
Miodrag Milanović ac96f318ef
Merge pull request #5676 from YosysHQ/emil/unit-test-by-default
Run unit tests on make test
2026-02-13 15:02:50 +01:00
Chris Hathhorn 1e852cef16 Fix segfault from shift with 0-width signed arg.
Fixes #5684.
2026-02-12 22:03:42 -06:00
Miodrag Milanović e4b32d6aae
Merge pull request #5670 from max-kudinov/gowin_mult
Gowin: Add DSP inference for GW1N and GW2A
2026-02-12 14:30:27 +01:00
Miodrag Milanovic cc79c6a761 Support building out of tree, but keep always in tests/unit 2026-02-12 12:17:07 +01:00
Maxim Kudinov b055ea05fd gowin: dsp: Add mult inference tests 2026-02-12 14:12:32 +03:00
Gus Smith 7a0774c3bb Don't dump params by default 2026-02-11 08:33:39 -08:00
Gus Smith b0021e5b10 Add tests 2026-02-11 08:10:57 -08:00
Gus Smith e3db8fee6f
Merge pull request #3459 from gs-jgj/feature_dsp48e1_presub
Add support for subtract in preadder
2026-02-11 08:02:18 -08:00
Gus Smith 8ab105ac28
Merge pull request #4303 from Coloquinte/sat_choice
Infrastructure to run a Sat solver as a command
2026-02-11 06:54:53 -08:00
Gus Smith b04948a8cd Simplify test 2026-02-09 09:38:45 -08:00
Robert O'Callahan 34f8582725
Sanitize ABC global and per-run temporary directory names in logs 2026-02-07 12:12:13 +13:00
Emil J 1717fa0180
Merge pull request #5663 from YosysHQ/emil/opt_expr-fix-pow-shift
opt_expr: fix const lhs of $pow to $shl
2026-02-05 13:09:01 +01:00
Gus Smith 3f01d7a33a Add test 2026-02-03 14:41:08 -08:00
Emil J. Tywoniak 91b226b4d4 specify: fix test 2026-02-03 18:40:32 +01:00
Emil J. Tywoniak c768e55983 ice40: fix dsp_const test 2026-02-03 18:10:29 +01:00
Emil J. Tywoniak 2efd0247a1 opt_hier: fix test 2026-02-03 18:10:29 +01:00
Emil J. Tywoniak 3bfeaee8ca opt_expr: fix const lhs of $pow to $shl 2026-02-03 11:59:00 +01:00
Emil J 59653da599
Merge pull request #5609 from nataliakokoromyti/upstream-design-run-pass
Add Design::run_pass()
2026-02-02 19:30:18 +01:00
Natalia 61b1c3c75a use run_pass in ecp5 add/sub test 2026-01-29 02:42:23 -08:00
Natalia 7439d2489e add assertion to run_pass test 2026-01-29 02:23:07 -08:00
Miodrag Milanović 43db5c9488
Merge pull request #5645 from nataliakokoromyti/upstream-verific-mixed-sv-vhdl
Upstream verific mixed sv vhdl
2026-01-29 10:12:09 +01:00
Natalia b6c148f84a tests/verific: ensure mixed -f requires VHDL unit 2026-01-28 22:46:10 -08:00
nella 8f6c4d40e4
Merge pull request #5623 from YosysHQ/nella/opt-dff-rewrite
opt_dff restructure.
2026-01-28 14:41:40 +01:00
Natalia 5a64fe2d91 tests/verific: assert module count explicitly 2026-01-28 04:21:13 -08:00
Natalia 8c2ef89732 tests/verific: import mixed -f list with -all 2026-01-28 04:13:04 -08:00
Natalia 74c601db0f tests/verific: add mixed -f list case 2026-01-28 03:55:42 -08:00
Gus Smith 09ceadfde7
Merge pull request #4269 from povik/icells_not_derived
Avoid `module_not_derived` on internal cells in techmap result
2026-01-26 14:48:40 -08:00
Emil J 5b10c7f3c6
Merge pull request #4928 from XutaxKamay/main
Add gatesi_mode to init gates under gates_mode in BLIF format
2026-01-26 23:30:11 +01:00
nella a3c9716f18 OptDff fix unit tests. 2026-01-26 22:35:25 +01:00
Emil J 673c8d1ae7
Merge pull request #5615 from rocallahan/remove-used-signals-updates
Don't update `used_signals` for retained wires in `rmunused_module_signals`.
2026-01-26 15:47:25 +01:00
nella a75e0b2e92 opt_dff minor cleanup, added tests for comp var. 2026-01-26 14:24:01 +01:00
Robert O'Callahan 32e96605d4 Don't update `used_signals` for retained wires in `rmunused_module_signals`.
These updates should not be necessary. In fact, if they were necessary, this code
would be buggy, because the results would depend on the order in which wires are traversed:
If wire A is retained, which causes an update to `used_signals`, which then causes wire B
to be retained when it otherwise wouldn't be, then we would get different results depending
on whether A is visited before B.

These updates will also make it difficult to process these wires in parallel.
2026-01-24 03:41:18 +00:00