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15577 Commits

Author SHA1 Message Date
Robert O'Callahan ac8259b02e Preserve `assign_map` across ABC invocations. 
Currently `assign_map` is rebuilt from the module from scratch every time we invoke ABC.
That doesn't scale when we do thousands of ABC runs over large modules. Instead,
create it once and then maintain incrementally it as we update the module.
 2025-08-14 22:27:04 +00:00
Robert O'Callahan 4de3ee093e Mark kept FF output wires as ports directly instead of via the 'keep' attribute 2025-08-14 22:26:38 +00:00
Robert O'Callahan ccb23ffc1a Fix indentation 2025-08-13 05:44:52 +00:00
Robert O'Callahan 885bb744e3 Make `module` a parameter of the function so we can change its constness in context 2025-08-13 05:44:52 +00:00
Robert O'Callahan 53c72c0d39 Move code in `abc_module()` that modifies the design into a new function `extract()` 
Splits up the big `abc_module()` function and isolates the code that modifies the design
after running ABC.
 2025-08-13 05:44:52 +00:00
Robert O'Callahan ceedcecfae Move the input parameters to `abc_module` that are identical across modules to an `AbcConfig` struct. 2025-08-13 05:44:52 +00:00
Robert O'Callahan 4ba42c4752 Move ABC pass state to a struct instead of storing it in global variables. 2025-08-13 05:44:52 +00:00
github-actions[bot] 8634d83320 Bump version 2025-08-13 00:25:15 +00:00
Emil J 9d047f9a30
Merge pull request #5283 from YosysHQ/emil/fix-simplify-initstate 
simplify: fix initstate crash
 2025-08-12 14:28:31 +02:00
Emil J. Tywoniak 6042ae0e8a simplify: add smoke test for system function calls 2025-08-12 12:59:31 +02:00
Emil J. Tywoniak 8582136a45 simplify: fix $initstate segfault 2025-08-12 12:39:36 +02:00
Emil J fb024c4d55
Merge pull request #5135 from YosysHQ/emil/ast-ownership 
ast, read_verilog: ownership in AST, use C++ styles for parser and lexer
 2025-08-12 10:58:12 +02:00
KrystalDelusion 407d425114
Merge pull request #5024 from YosysHQ/krys/update_evals 
Updating test_cell
 2025-08-12 14:27:03 +12:00
Krystine Sherwin 1e6e25c81f
ci: Use correct build artifact 2025-08-12 12:43:14 +12:00
Krystine Sherwin c630f995d5
ci: Reduce test_cell count and use a seed 2025-08-12 11:17:00 +12:00
Krystine Sherwin ba01f7c64f
ci: Run test_cell 
Includes special cases for partially supported cells.
 2025-08-12 10:57:59 +12:00
Krystine Sherwin 1afe8d9f4d
celltypes: Comment pointing to ConstEval 
`CellTypes::eval()` is more generic but also more limited.  `ConstEval::eval()` requires more setup (both in code and at runtime) but has more complete support.
 2025-08-12 10:57:59 +12:00
Krystine Sherwin 20c2d2a6f3
test_cell: Add comment on $pmux 
`-simlib` also doesn't work.
 2025-08-12 10:57:59 +12:00
Martin Povišer c589714433
test_cell: Update to $macc_v2 2025-08-12 10:57:59 +12:00
Krystine Sherwin db4ffaffd2
consteval: Fix $bwmux handling 
If the cell type has a S signal and hasn't already been handled, use `CellTypes::eval(cell, A, B, S)`.
 2025-08-12 10:57:58 +12:00
Krystine Sherwin 014eadd8b9
test_cell: Fix $bweqx 2025-08-12 10:57:58 +12:00
Krystine Sherwin 22aa9fba3b
test_cell: Support more cell types 
Still unsupported:
- wide muxes (`$_MUX16_` and friends)

Partially supported types have comments in `test_cell.cc`.

Fix `CellTypes::eval() for `$_NMUX_`.
Fix `RTLIL::Cell::fixup_parameters()` for $concat, $bwmux and $bweqx.
 2025-08-12 10:57:58 +12:00
Krystine Sherwin 481ecb51a7
test_cell: Disable $macc testing 
Needs updating to `$macc_v2`.
 2025-08-12 10:57:58 +12:00
Jannis Harder 2d90e80b52
Merge pull request #5270 from zhanghongce/main 
Reorder the port wire declarations to follow the same order of the port declarations
 2025-08-11 15:35:25 +02:00
Emil J. Tywoniak 642e041f77 const2ast: fix for consistency with previous diagnostics behavior 2025-08-11 13:34:10 +02:00
Emil J. Tywoniak 99ab73424d verilog_location: rename location to Location to avoid conflict with Pass::location 2025-08-11 13:34:10 +02:00
Emil J. Tywoniak 5195f81257 ast: fix import node 2025-08-11 13:34:10 +02:00
Emil J. Tywoniak df8422d244 verilog_lexer: refactor 2025-08-11 13:34:10 +02:00
Emil J. Tywoniak 740ed3fc1c ast: refactor 2025-08-11 13:34:10 +02:00
Emil J. Tywoniak 646c45e6b8 ast: remove null_check as dead code 2025-08-11 13:34:10 +02:00
Emil J. Tywoniak 25d2a8ce3a simplify: simplify 2025-08-11 13:34:10 +02:00
Emil J. Tywoniak 97bc0088d8 simplify: std::gcd 2025-08-11 13:34:10 +02:00
Krystine Sherwin d3e33a3be5 simplify.cc: Drop unused debug prints 
At least the ones added by this PR.  There are some unused debug prints that are *changed* by this PR, but I've left them.
 2025-08-11 13:34:10 +02:00
Krystine Sherwin 9b882c32c1 frontends/ast: More usage of auto 
For consistency.
 2025-08-11 13:34:10 +02:00
Krystine Sherwin 720f33271d docs: Update ubuntu apt-get 
Also mention CXXSTD fix for cygwin.
 2025-08-11 13:34:10 +02:00
Emil J. Tywoniak 5b62616b63 preproc: formatting 2025-08-11 13:34:10 +02:00
Emil J. Tywoniak 9a10f4c02f verilog_lexer, verilog_parser: remove comment 2025-08-11 13:34:10 +02:00
Emil J. Tywoniak ae65b4fc84 verilog_lexer: fix fallthrough warning 2025-08-11 13:34:10 +02:00
Emil J 39c5c256c0 verilog_lexer: remove comment 
Co-authored-by: KrystalDelusion <93062060+KrystalDelusion@users.noreply.github.com>
 2025-08-11 13:34:10 +02:00
Emil J. Tywoniak abb8b8d28b preproc: formatting 2025-08-11 13:34:10 +02:00
Emil J. Tywoniak deedfbefe2 fixup! readme, verilog_parser: bison 3.8 and ubuntu 22.04 example 2025-08-11 13:34:10 +02:00
Emil J. Tywoniak cbccc01d38 Revert "CI: bump flex and bison on Windows" 
This reverts commit efbc138ced.
 2025-08-11 13:34:10 +02:00
Emil J aedc237c7a rtlil: remove comment 
Co-authored-by: KrystalDelusion <93062060+KrystalDelusion@users.noreply.github.com>
 2025-08-11 13:34:10 +02:00
Krystine Sherwin 1a63dd56bd Add flex lib to vcxsrc include dirs 2025-08-11 13:34:10 +02:00
Krystine Sherwin 4f824e4223 Sneak FlexLexer.h into VS build 2025-08-11 13:34:10 +02:00
Catherine 8455503a50 CI: fix typo 2025-08-11 13:34:10 +02:00
Catherine 4956d3cce5 CI: install flex for WASI builds. 2025-08-11 13:34:10 +02:00
Emil J. Tywoniak 0ce51029f6 fixup! CI: sneak FlexLexer.h into the WASI sysroot 2025-08-11 13:34:10 +02:00
Emil J. Tywoniak 3ec3afb414 CI: bump flex and bison on Windows 2025-08-11 13:34:10 +02:00
Emil J. Tywoniak f3ebf0557e CI: sneak FlexLexer.h into the WASI sysroot 2025-08-11 13:34:10 +02:00