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261 Commits

Author SHA1 Message Date
Akash Levy b8d83c1d5b Fix cell naming issues 2026-02-13 01:05:51 -08:00
Akash Levy 652a9a63b2 Update to latest and fix all disabled tests 2025-09-28 01:33:08 -07:00
Robert O'Callahan 1e5f920dbd Remove .c_str() from parameters to log_debug() 2025-09-23 19:10:33 +12:00
Akash Levy 60d969530b Bump to latest 2025-09-21 01:10:04 -07:00
Robert O'Callahan a7c46f7b4a Remove .c_str() calls from parameters to log_warning()/log_warning_noprefix() 2025-09-16 23:02:16 +00:00
Robert O'Callahan 23f196a3b8 Update passes/memory to avoid bits() 2025-09-16 03:17:23 +00:00
Akash Levy f5cb0c328f Bump Yosys to latest 2025-09-13 04:35:52 -07:00
Jannis Harder dd9627ed05
Merge pull request #5336 from rocallahan/remove-log-cstr 
Remove `.c_str()` calls from `log()`/`log_error()`
 2025-09-12 14:09:48 +02:00
Krystine Sherwin f102b25914 Reapply "Merge pull request #5301 from KrystalDelusion/krys/re_5280" 
This reverts commit 88eb83a0c3.
 2025-09-12 10:41:01 +02:00
Robert O'Callahan e0ae7b7af4 Remove .c_str() calls from log()/log_error() 
There are some leftovers, but this is an easy regex-based approach that removes most of them.
 2025-09-11 20:59:37 +00:00
Akash Levy 2d5c16b798
Merge branch 'YosysHQ:main' into main 2025-09-09 06:51:28 -07:00
Akash Levy 1b3375d8df Merge upstream in 2025-09-09 05:50:48 -07:00
Jannis Harder 61a00b9131 memory_libmap: Fix use of uninitialized value for async read ports 
The code in memory_libmap expects `clk_en` to be initialized for all
`PortVariant`s but the parsing in memlib.cc didn't initialize it for
variants of kind `PortKind::Ar` (async read ports).

While this fixes the immediate CI failure, it would be best to refactor
the code so it becomes obvious if something isn't initialized.
 2025-09-09 13:32:46 +02:00
Robert O'Callahan c7df6954b9 Remove .c_str() from stringf parameters 2025-09-01 23:34:42 +00:00
Miodrag Milanovic 88eb83a0c3 Revert "Merge pull request #5301 from KrystalDelusion/krys/re_5280" 
This reverts commit c9a602e882, reversing
changes made to 51eaaffe09.
 2025-08-28 11:58:02 +02:00
Krystine Sherwin 3ca2b7951f
memlib: Fix ubsan 2025-08-19 17:05:51 +12:00
Akash Levy 56caf7cd84 Bump Yosys to latest 2025-08-13 13:37:37 -07:00
Emil J. Tywoniak c8e0ac0c61 ast, read_verilog: ownership in AST, use C++ styles for parser and lexer 2025-08-11 13:34:10 +02:00
Akash Levy cc733fd11b Merge from upstream 2025-07-30 22:50:14 -07:00
Fred Tombs b64484795d Fix typos in memlib 2025-07-29 15:27:59 -04:00
Akash Levy 5f5ed1b29e Merge upstream yosys 2025-04-21 17:36:24 -07:00
Emil J. Tywoniak 872a197e94 memory_libmap: fix MapWorker memory allocation 2025-04-14 12:41:14 +02:00
Akash Levy f218b5ba58 Revert "Represent memory size with size_t" 
This reverts commit bb5f8415af.
 2025-04-04 03:20:07 -07:00
Akash Levy bb5f8415af Represent memory size with size_t 2025-04-04 02:04:34 -07:00
Akash Levy 12137c7ac4 Update memory_dff naming 2025-03-05 06:39:47 -08:00
Akash Levy cefce37e59
Merge branch 'YosysHQ:main' into main 2025-02-12 09:01:46 -08:00
Emil J. Tywoniak 55b60dca95 memory_libmap: update indices on design modification 2025-02-11 13:32:34 +01:00
Akash Levy 894c9816d3 Improve naming: big fix 2024-11-11 17:06:11 -08:00
Emil J. Tywoniak 785bd44da7 rtlil: represent Const strings as std::string 2024-10-14 06:28:12 +02:00
Martin Povišer 158fbf881e memory_map: Explain `-iattr` better 2024-03-06 15:15:37 +01:00
Martin Povišer 030d639201 opt_mem, memory_*: Refuse to operate in presence of processes 
Processes can contain `MemWriteAction` entries which are invisible to
most passes operating on memories but which will be lowered to write
ports later on by `proc_memwr`. For that reason we can get corrupted
RTLIL if we sequence the memory passes before `proc`. Address that by
making the affected memory passes ignore modules with processes.
 2024-02-23 12:27:53 +01:00
Martin Povišer 975517b022 memory_memx: Fix log header 2024-02-23 12:27:10 +01:00
uis 5902b2826d Fix printf formats 2024-01-15 12:07:54 +01:00
N. Engelhardt 080da693d1 memory_libmap: update search order for attributes 2023-10-24 13:55:45 +02:00
N. Engelhardt 1b6d1e9419 memory_libmap: look for ram_style attributes on surrounding signals 2023-10-19 19:23:35 +02:00
Martin Povišer c6566b660f memlib.md: Fix typo 2023-09-04 17:38:35 +02:00
Martin Povišer 3de84b959f memory_libmap: Tweak whitespace 2023-09-04 17:38:35 +02:00
N. Engelhardt 57de249881 memory_libmap: print additional debug messages when no valid mapping is found 2023-07-06 18:54:32 +02:00
N. Engelhardt a6be7b4751 memory_libmap: add debug messages for some reasons for rejecting mappings 2023-06-29 14:08:31 +02:00
N. Engelhardt 7542146fc5 memory_libmap: print message about attributes forcing ram kind 2023-06-28 17:48:20 +02:00
KrystalDelusion 9465b2af95 Fitting help messages to 80 character width 
Uses the regex below to search (using vscode):
	^\t\tlog\("(.{10,}(?<!\\n)|.{81,}\\n)"\);

Finds any log messages double indented (which help messages are)
and checks if *either* there are is no newline character at the end,
*or* the number of characters before the newline is more than 80.
 2022-08-24 10:40:57 +12:00
Jannis Harder a2f9ebe43a memory_map: Add -formal option 
This maps memories for a global clock based formal verification flow.
This implies -keepdc, uses $ff cells for ROMs and sets hdlname
attributes.
 2022-08-16 13:37:30 +02:00
Jannis Harder a6b440b5c9 memory_map: avoid undriven unused FF inputs for -keepdc 2022-06-28 19:05:35 +02:00
Jannis Harder d78d807a7f memory_map: -keepdc option for formal 
Use it when invoking memory_map -rom-only from write_{smt2,btor}.
 2022-06-27 15:47:55 +02:00
Marcelina Kościelnicka ab3a9325c3 memory_map: Add -rom-only option. 2022-06-17 16:56:11 +02:00
Marcelina Kościelnicka 01daa077a2 memory_map: Use const drivers instead of FFs for ROMs. 2022-06-17 15:17:14 +02:00
Marcelina Kościelnicka d69091806a memory_libmap: Fix wrprio handling. 2022-06-17 02:09:37 +02:00
Marcelina Kościelnicka 25a4cd7020 memory_libmap: Fix params emitted for unused ports for consistency. 2022-06-16 08:14:08 +02:00
Marcelina Kościelnicka 71dfbf33b2 Add -no-rw-check option to memory_dff + memory + synth_{ice40,ecp5,gowin}. 2022-06-02 23:16:12 +02:00
Marcelina Kościelnicka 3a0aa9c663 memory_dff: Add support for no_rw_check attribute. 2022-06-02 12:49:34 +02:00