luke/yosys
1
0
Fork 0
mirror of https://github.com/YosysHQ/yosys.git synced 2026-09-02 02:57:40 +02:00
Code Issues Packages Projects Releases Wiki Activity
1,100 Commits 152 Branches 70 Tags
63dfbb18cfb34d72746565a3eb3ffbcd7451cdab
Commit Graph
4 Commits
Author SHA1 Message Date
Clifford Wolf bada3ee815 Fixed yosys path in tests/techmap/mem_simple_4x1_runtest.sh 2014-03-11 11:59:58 +01:00
Clifford Wolf 4fd1a4c12b Use "verilog -noattr" in tests/techmap/mem_simple_4x1 test (for old iverilog) 2014-03-11 11:39:30 +01:00
Clifford Wolf 3c5e973092 Use private namespace in mem_simple_4x1_map 2014-02-21 12:14:38 +01:00
Clifford Wolf 81b3f52519 Added tests/techmap/mem_simple_4x1 2014-02-21 12:06:40 +01:00