Commit Graph
17789 Commits
Author SHA1 Message Date
Nick Allison 0bf55a858b Merge pull request #6164 from YosysHQ/nick/fix-6151
Adding error cases to formal backends for invalid formal cells
2026-09-02 14:42:28 +00:00
Miodrag Milanović 28b7a17675 Merge pull request #6115 from YosysHQ/log-sink
log rewrite [sc-748]
2026-09-02 13:03:29 +00:00
nella 1103ca971c Merge pull request #6110 from YosysHQ/nella/opt_dff-cleanup
opt_dff -sat: cleanup and refactor [sc-725]
2026-09-02 09:12:26 +00:00
nick 3deb8f313e fix 6151 - adding error cases to formal backends / also adding test
cases
2026-09-01 14:34:28 -06:00
Miodrag Milanović 56cf2cf419 Merge pull request #6159 from YosysHQ/mmicko/update_sv_elab
Update sv-elab to release 2026-08-30
2026-09-01 06:37:05 +00:00
Miodrag Milanovic 7c10ee1c58 Update sv-elab as of 2026-09-01 2026-09-01 08:20:05 +02:00
Miodrag Milanovic 726aff678f log: remove log_ prefix and unified some namings 2026-08-31 11:20:21 +02:00
Miodrag Milanovic 09c227b0a7 log_stderr_sink_forced since it is external sink configuration 2026-08-31 10:34:45 +02:00
Miodrag Milanovic cdb5ff5f99 log: keep log_debug a macro 2026-08-31 08:25:47 +02:00
nella e0bf46ebc5 Separate non -sat constbits. 2026-08-27 23:10:40 +06:00
nella d26f1a8573 Review fixups
Co-authored-by: Emil J. Tywoniak <[email protected]>
2026-08-27 23:10:40 +06:00
Emil J. Tywoniak 0c0b6c2bdd opt_dff: smaller context structs 2026-08-27 23:10:40 +06:00
Emil J. Tywoniak 60da0e8ef0 opt_clean: move 2026-08-27 23:10:40 +06:00
Emil J. Tywoniak f8bf9ad1c8 opt_dff: split up 2026-08-27 23:10:40 +06:00
nella 95baa38274 Document ConstObligation. 2026-08-27 23:10:40 +06:00
nella 32a9fd2281 Whitespace. 2026-08-27 23:10:40 +06:00
nella 5f5c1a7a33 Comment and style touchups. 2026-08-27 23:10:40 +06:00
nella 01df56414d One sat query per obligation. 2026-08-27 23:10:40 +06:00
nella fc4b87363e Bundle eqbits candidates. 2026-08-27 23:10:40 +06:00
nella 96e776fbfc Single driver lookup in bitsim. 2026-08-27 23:10:40 +06:00
nella 040dbe0839 Constbits counterexample watch list. 2026-08-27 23:10:40 +06:00
nella 4c0979e88e Separate constbits batching. 2026-08-27 23:10:40 +06:00
nella 5a5fe1619b Split constbits into gather/solve/commit. 2026-08-27 23:10:40 +06:00
nella 8943824f07 Sigmap const checks. 2026-08-27 23:10:40 +06:00
nella 190671ac8d Document constbits candidate logic. 2026-08-27 23:10:40 +06:00
nella 7cea58eead More sat constbits tests. 2026-08-27 23:10:40 +06:00
nella c30457480f Merge pull request #6155 from YosysHQ/nella/xaiger2-bufnorm-edgecases
ABCU: fix bufnorm edge cases
2026-08-27 15:08:19 +00:00
nella 2c40c4ea13 Readd seeding comment. 2026-08-27 15:16:48 +02:00
nella f0236d8d20 Move module seeding into Design::add. 2026-08-27 14:34:10 +02:00
nella 5ff5eeb9f8 Fix bufnorm edge cases. 2026-08-26 16:08:45 +02:00
Miodrag Milanovic b3e25aea62 log: couple of fixes 2026-08-26 12:27:29 +02:00
Miodrag Milanovic a3cc43277f log: added log_deprecated 2026-08-26 08:40:12 +02:00
Miodrag Milanović 13b43f8c85 Merge pull request #6149 from YosysHQ/mmicko/cxxheaderparser
pyosys: Check for required cxxheaderparser version, fixes #5974
2026-08-26 06:01:37 +00:00
Miodrag Milanovic ab2610b816 pyosys: Check for required cxxheaderparser version, fixes #5974 2026-08-25 13:37:56 +02:00
Emil J dd83bbad28 Merge pull request #6116 from antmicro/mgan/hdlname-fix
Fix ignored `hdlname` attribute in `dfflibmap` pass
2026-08-24 11:36:17 +00:00
Emil J e3af33003d Merge pull request #6141 from john-kearney/fix-json-netnames-signed
json: read 'signed' on netnames, matching ports
2026-08-24 10:19:44 +00:00
Emil J 85acd07685 Merge pull request #6123 from sifferman/fix-resetall-default-nettype
Fix resetall not affecting default_nettype
2026-08-24 09:47:04 +00:00
Miodrag Milanović 2e1666cd82 Merge pull request #6147 from YosysHQ/mmicko/cleanup
cleanup: remove status message
2026-08-24 09:41:29 +00:00
Miodrag Milanovic 1643567be6 cleanup: remove status message 2026-08-24 11:23:35 +02:00
Miodrag Milanović 47bbdab297 Merge pull request #6139 from tangxifan/xt_openfpga_cmake
Support Yosys built as a subdirectory
2026-08-24 07:16:21 +00:00
tangxifan 02dc5a82d7 [core] add a cmake option to disable unit test during compilation; Use cmake_current_source for submodule integration
[core] debug yosys version extraction

[core] debug

[core] now cache the cmake source dir

[core] debug

[core] debug kernel dependencies

[core] debug common include directories

[core] debug

[core] debug simlib_help.inc

[core] debug pmgen py path in cmake

[core] syntax

[core] debug flex source

[core] restore

[core] debug executable output as it now shows linking to .

[core] debug yosys-abc directory

[core] debug cmake share directory

[core] debug yosys abc

[core] restore shared directory location as yosys requires fixed location

[core] rework link target to yosys sub dir under build

[core] fixed the bug on yosys-config.install location for install

[core] cmake syntax

[core] correct the location for share directory

[core] debug

[core] debug

[core] debug

[core] enforce internal attributes; rename the YOSYS_ENABLE_UNIT_TESTS; use YOSYS_CMAKE_BINARY_DIR for all

[core] apply review comments

[core] rename

[core] change all the CMAKE_BINARY_DIR to YOSYS_CMAKE_BINARY_DIR

[core] replace CMAKE_SOURCE_DIR to YOSYS_CMAKE_SOURCE_DIR
2026-08-21 12:09:04 -07:00
Miodrag Milanovic 14f85ce38e log: updating review point 2026-08-21 13:25:47 +02:00
nella a34d3baae9 Merge pull request #6131 from DanielMBouyou/fix/arith_tree-narrow-intermediate-truncation
arith_tree: don't fold a chain link narrower than its consumer
2026-08-21 09:12:00 +00:00
Daniel M'BOUYOU 25c7053114 arith_tree: add regression tests for truncating narrow chain links
#6130 fixed arith_tree so that a chain link narrower than its consumer
is left out of the tree, and added an equivalence regression for the
exact failing shape. Cover what that test does not: structural checks
that the narrow link survives as its own cell, on both the raw $add
path and the alumacc $alu path, and a mixed case where a wider chain
consuming the truncated link as a leaf still folds and stays
equivalent.

Signed-off-by: Daniel M'BOUYOU <[email protected]>
2026-08-21 10:38:58 +02:00
Miodrag Milanovic ec80d539e1 log: fix pyosys wrapper for added format 2026-08-21 09:54:41 +02:00
Miodrag Milanovic 900fd36eec log: small cleanup 2026-08-21 09:19:56 +02:00
Miodrag Milanovic 01f63a6367 log: header is one message, but only content is compared in match 2026-08-21 08:12:07 +02:00
John Kearney 0f5efca3c9 json: read 'signed' attribute on netnames, matching ports
The JSON backend writes "signed": 1 for any signed wire, including
internal nets. The frontend only parsed the attribute for ports,
so a write-read roundtrip silently cleared is_signed on internal
nets. Signed internal wires became unsigned between the two passes.

Fix: parse 'signed' in the netnames loop, next to the existing
upto/offset handling. Regression test does a full roundtrip and
checks the internal signed wire survives.
2026-08-20 22:20:24 -07:00
Nick Allison 144c707b78 Merge pull request #6117 from Zaneham/check-cells-backends
Error rather than silently drop $check cells in write_smt2 and write_btor
2026-08-20 20:16:36 +00:00
Nick Allison 5c0100c45e Merge branch 'main' into check-cells-backends 2026-08-20 13:07:22 -06:00