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emil/srcref
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36 Commits
Author SHA1 Message Date
Emil J. Tywoniak c36bc102d4 rtlil backend: widen the warning about writing processes 
A process holds locations on its cases and switches as well as on its
actions, and none of them survive a write.
 2026-08-25 13:10:33 +02:00
Emil J. Tywoniak 9a93e377a3 rtlil: replace SigSig actions with new type SyncAction 
(cherry picked from commit bfc098772c0244273ee52a8989168a6a6c0c89f2)
 2026-08-25 12:41:46 +02:00
Emil J. Tywoniak ba74d22f6b rtlil: intern source locations in a per-design SrcPool 
Source locations move off the attribute dict into a dedicated SrcRef on
AttrObject, interned in a per-design SrcPool that hash-conses sets of
location twines. Locations share their file prefix with each other through
the twine pool, and objects that fuse (opt_merge, share, ff/mem rewrites)
carry the union of their inputs' locations instead of a '|'-joined string.

write_rtlil emits an `srcs` section of location sets alongside `twines`;
read_rtlil resolves `\src "@N"` back to a handle and still accepts a plain
location string. -readable renders the locations as text.
 2026-08-25 11:40:52 +02:00
Emil J. Tywoniak 1168e35394 twine: split Twine into in-memory TwineNode that doesn't support autoidx variants and temporary TwineSpec that does 2026-08-24 15:53:14 +02:00
Emil J. Tywoniak db85857a16 backends: reduce twine structural loss for roundtrips 2026-08-13 18:15:58 +02:00
Emil J. Tywoniak 0363b660c9 backends: trivial twine damage 2026-08-13 18:15:58 +02:00
Emil J. Tywoniak 4a7a670fb6 kernel: reimplement IdString as handle on a Twine in a per-design TwinePool 2026-08-13 18:15:40 +02:00
Catherine a727e7f6e7 Migrate build system to CMake 
See #5895 for details.

This commit does not include CI or documentation changes.
 2026-06-03 08:58:10 +00:00
KrystalDelusion 529886f7fb Merge pull request #5473 from YosysHQ/krys/unsized_params 
Handle unsized params
 2025-11-12 07:14:44 +13:00
Robert O'Callahan 92ea557979 Build a temporary SigChunk list in the iterator in the cases where that's needed 2025-11-07 15:54:55 +00:00
Krystine Sherwin 7302bf9a66 Add CONST_FLAG_UNSIZED 
In order to support unsized constants being used as parameters, the `const` struct needs to know if it is unsized (so that the parameter can be used to set the size).
Add unsized flag to param value serialization and rtlil back-/front-end.
Add cell params to `tests/rtlil/everything.v`.
 2025-11-07 17:45:07 +13:00
Emil J. Tywoniak bcc69d5f6e write_rtlil: add -sort to match old behavior 2025-09-16 15:47:16 +02:00
Emil J. Tywoniak 1328a33e82 write_rtlil: dump in insertion order 2025-09-16 15:47:14 +02:00
Emil J. Tywoniak 430adb3b59 write_rtlil: don't sort 2025-09-16 15:39:12 +02:00
Robert O'Callahan e0ae7b7af4 Remove .c_str() calls from log()/log_error() 
There are some leftovers, but this is an easy regex-based approach that removes most of them.
 2025-09-11 20:59:37 +00:00
Robert O'Callahan c7df6954b9 Remove .c_str() from stringf parameters 2025-09-01 23:34:42 +00:00
Emil J. Tywoniak 90a2c92370 driver: allow --no-version still write things like Generated by Yosys 2025-05-07 11:34:23 +02:00
Emil J. Tywoniak d7affb8821 driver: add --no-version to suppress writing Yosys version in command outputs 2025-05-05 13:12:08 +02:00
Krystine Sherwin cd3b914132 Reinstate #4768 
Revert the reversion so that we can fix the bugs that the PR missed.
 2025-04-08 11:58:05 +12:00
Miodrag Milanović d49364d96f Revert "Refactor full_selection" 2025-04-07 12:11:55 +02:00
Krystine Sherwin dac2bb7d4d Use selection helpers 
Catch more uses of selection constructor without assigning a design.
 2025-03-14 14:08:13 +13:00
Krystine Sherwin ee73a91f44 Remove references to ilang 2024-11-05 12:36:31 +13:00
Emil J. Tywoniak 785bd44da7 rtlil: represent Const strings as std::string 2024-10-14 06:28:12 +02:00
Martin Povišer e13ace675e dump: Update help after option removal 2024-09-17 10:46:20 +02:00
Martin Povišer 865df26fac Adjust buf-normalized mode 2024-09-17 10:46:20 +02:00
Claire Xenia Wolf 80119386c0 Add RTLIL "buffered-normalized mode" and improve "bufnorm" pass 
Signed-off-by: Claire Xenia Wolf <[email protected]>
 2024-09-17 10:46:20 +02:00
Roland Coeurjoly 91e3773b51 Ensure signed constants are correctly parsed, represented, and exported in RTLIL. Add a test to check parsing and exporting 2024-08-21 14:28:42 +01:00
Jannis Harder b08a880704 backends/rtlil: Do not shorten a value with z bits to 'x 2023-01-29 14:02:25 +01:00
Miodrag Milanovic 6574553189 Fixes for some of clang scan-build detected issues 2023-01-17 12:58:08 +01:00
Miodrag Milanovic 99f1c71582 properly encode string in rtlil 2022-08-09 12:45:32 +02:00
Marcelina Kościelnicka d019b4e681 rtlil: Dump empty connections when whole module is selected. 
Without this, empty connections will be always skipped by `dump`, since
they contain no selected wires.  This makes debugging rather confusing.
 2021-12-12 01:22:06 +01:00
Claire Xenia Wolf 89df26e4bc Add optimization to rtlil back-end for all-x parameter values 
Signed-off-by: Claire Xenia Wolf <[email protected]>
 2021-09-27 16:02:20 +02:00
Claire Xenia Wolf 72787f52fc Fixing old e-mail addresses and deadnames 
s/((Claire|Xen|Xenia|Clifford)\s+)+(Wolf|Xen)\s+<(claire|clifford)@(symbioticeda.com|clifford.at|yosyshq.com)>/Claire Xenia Wolf <[email protected]>/gi;
s/((Nina|Nak|N\.)\s+)+Engelhardt\s+<nak@(symbioticeda.com|yosyshq.com)>/N. Engelhardt <[email protected]>/gi;
s/((David)\s+)+Shah\s+<(dave|david)@(symbioticeda.com|yosyshq.com|ds0.me)>/David Shah <[email protected]>/gi;
s/((Miodrag)\s+)+Milanovic\s+<(miodrag|micko)@(symbioticeda.com|yosyshq.com)>/Miodrag Milanovic <[email protected]>/gi;
s,https?://www.clifford.at/yosys/,http://yosyshq.net/yosys/,g;
 2021-06-08 00:39:36 +02:00
Marcelina Kościelnicka 192601385f rtlil: Fix process memwr roundtrip. 
Fixes #2646 fallout.
 2021-03-23 19:49:47 +01:00
Marcelina Kościelnicka 4e03865d5b Add support for memory writes in processes. 2021-03-08 20:16:29 +01:00
whitequark 00e7dec7f5 Replace "ILANG" with "RTLIL" everywhere. 
The only difference between "RTLIL" and "ILANG" is that the latter is
the text representation of the former, as opposed to the in-memory
graph representation. This distinction serves no purpose but confuses
people: it is not obvious that the ILANG backend writes RTLIL graphs.

Passes `write_ilang` and `read_ilang` are provided as aliases to
`write_rtlil` and `read_rtlil` for compatibility.
 2020-08-26 17:29:32 +00:00