muxcover: avoid hang on loop through mux tree

This commit is contained in:
Emil J. Tywoniak
2026-09-29 18:40:19 +02:00
parent 6f876ae0e2
commit de761e7f23
2 changed files with 45 additions and 0 deletions
+10
View File
@@ -135,10 +135,15 @@ struct MuxcoverWorker
pool<SigBit> wavefront;
wavefront.insert(rootsig);
bool has_loop = false;
while (!wavefront.empty()) {
SigBit bit = wavefront.pop();
if (sig_to_mux.count(bit) && (bit == rootsig || !roots.count(bit))) {
if (tree.muxes.count(bit)) {
has_loop = true;
break;
}
Cell *c = sig_to_mux.at(bit);
tree.muxes[bit] = c;
wavefront.insert(sigmap(c->getPort(ID::A)));
@@ -146,6 +151,11 @@ struct MuxcoverWorker
}
}
if (has_loop) {
log(" Skipping tree at root %s: contains a logic loop.\n", log_signal(tree.root));
continue;
}
if (!tree.muxes.empty()) {
log(" Found tree with %d MUXes at root %s.\n", GetSize(tree.muxes), log_signal(tree.root));
tree_list.push_back(tree);
+35
View File
@@ -0,0 +1,35 @@
read_verilog <<EOT
module top(input s, d, output a);
assign a = s ? a : d;
endmodule
EOT
simplemap
muxcover -mux4 -mux8
select -assert-count 1 t:$_MUX_
design -reset
read_verilog <<EOT
module top(input [3:0] s, input [3:0] d, output a);
wire b = s[1] ? a : d[1];
wire c = s[2] ? d[2] : d[3];
wire e = s[3] ? b : c;
assign a = s[0] ? e : d[0];
endmodule
EOT
simplemap
muxcover -mux4 -mux8
select -assert-count 4 t:$_MUX_
select -assert-none t:$_MUX4_ t:$_MUX8_
design -reset
read_verilog <<EOT
module top(input s, a, b, c, output y);
wire m = y ? b : a;
assign y = s ? c : m;
endmodule
EOT
simplemap
muxcover -mux4=1 -dmux=0
select -assert-count 1 t:$_MUX4_
select -assert-count 1 t:$_MUX4_ %co:+[Y] t:$_MUX4_ %ci:+[S] %i w:* %i
select -assert-none t:$_MUX_