mirror of
https://github.com/YosysHQ/yosys.git
synced 2026-10-06 01:53:53 +02:00
techlibs: remove includes, imported by common_sim.vh already
This commit is contained in:
@@ -217,10 +217,3 @@ module DP16KD(
|
||||
parameter INITVAL_3F = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000;
|
||||
parameter INIT_DATA = "STATIC";
|
||||
endmodule
|
||||
|
||||
`ifndef NO_INCLUDES
|
||||
|
||||
`include "cells_ff.vh"
|
||||
`include "cells_io.vh"
|
||||
|
||||
`endif
|
||||
|
||||
@@ -1,9 +1,2 @@
|
||||
`include "common_sim.vh"
|
||||
`include "ccu2d_sim.vh"
|
||||
|
||||
`ifndef NO_INCLUDES
|
||||
|
||||
`include "cells_ff.vh"
|
||||
`include "cells_io.vh"
|
||||
|
||||
`endif
|
||||
|
||||
@@ -1,9 +1,2 @@
|
||||
`include "common_sim.vh"
|
||||
`include "ccu2d_sim.vh"
|
||||
|
||||
`ifndef NO_INCLUDES
|
||||
|
||||
`include "cells_ff.vh"
|
||||
`include "cells_io.vh"
|
||||
|
||||
`endif
|
||||
|
||||
@@ -1,9 +1,2 @@
|
||||
`include "common_sim.vh"
|
||||
`include "ccu2d_sim.vh"
|
||||
|
||||
`ifndef NO_INCLUDES
|
||||
|
||||
`include "cells_ff.vh"
|
||||
`include "cells_io.vh"
|
||||
|
||||
`endif
|
||||
|
||||
Reference in New Issue
Block a user