diff --git a/techlibs/lattice/cells_sim_ecp5.v b/techlibs/lattice/cells_sim_ecp5.v
index 41836e58f..c92e097f3 100644
--- a/techlibs/lattice/cells_sim_ecp5.v
+++ b/techlibs/lattice/cells_sim_ecp5.v
@@ -217,10 +217,3 @@ module DP16KD(
 	parameter INITVAL_3F = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000;
 	parameter INIT_DATA = "STATIC";
 endmodule
-
-`ifndef NO_INCLUDES
-
-`include "cells_ff.vh"
-`include "cells_io.vh"
-
-`endif
diff --git a/techlibs/lattice/cells_sim_xo2.v b/techlibs/lattice/cells_sim_xo2.v
index 544142875..f2e8c552b 100644
--- a/techlibs/lattice/cells_sim_xo2.v
+++ b/techlibs/lattice/cells_sim_xo2.v
@@ -1,9 +1,2 @@
 `include "common_sim.vh"
 `include "ccu2d_sim.vh"
-
-`ifndef NO_INCLUDES
-
-`include "cells_ff.vh"
-`include "cells_io.vh"
-
-`endif
diff --git a/techlibs/lattice/cells_sim_xo3.v b/techlibs/lattice/cells_sim_xo3.v
index 544142875..f2e8c552b 100644
--- a/techlibs/lattice/cells_sim_xo3.v
+++ b/techlibs/lattice/cells_sim_xo3.v
@@ -1,9 +1,2 @@
 `include "common_sim.vh"
 `include "ccu2d_sim.vh"
-
-`ifndef NO_INCLUDES
-
-`include "cells_ff.vh"
-`include "cells_io.vh"
-
-`endif
diff --git a/techlibs/lattice/cells_sim_xo3d.v b/techlibs/lattice/cells_sim_xo3d.v
index 544142875..f2e8c552b 100644
--- a/techlibs/lattice/cells_sim_xo3d.v
+++ b/techlibs/lattice/cells_sim_xo3d.v
@@ -1,9 +1,2 @@
 `include "common_sim.vh"
 `include "ccu2d_sim.vh"
-
-`ifndef NO_INCLUDES
-
-`include "cells_ff.vh"
-`include "cells_io.vh"
-
-`endif