yosys/tests/verific/README.md

# Verific Test Cases

## Disabled

- `bounds`: relies on using Verific's VHDL frontend
- `memory_semantics`: relies on initial values being retained, which we do not want
- `rom_case`: relies on using Verific's VHDL frontend
- `blackbox*`: we need different behavior for parametrized blackboxes
Clean up Verific tests 2024-09-23 13:05:08 +02:00			`# Verific Test Cases`

Standardize convention, add back test, update README 2024-09-23 15:06:43 +02:00			`## Disabled`
Clean up Verific tests 2024-09-23 13:05:08 +02:00
Rename verific to import in tests and update README explanation 2025-01-17 04:34:02 +01:00			- `bounds`: relies on using Verific's VHDL frontend
Update Verific README 2024-09-23 14:35:48 +02:00			- `memory_semantics`: relies on initial values being retained, which we do not want
Rename verific to import in tests and update README explanation 2025-01-17 04:34:02 +01:00			- `rom_case`: relies on using Verific's VHDL frontend
Disable Verific blackbox checks (different from our preferred approach) 2025-01-21 14:46:40 +01:00			- `blackbox*`: we need different behavior for parametrized blackboxes