yosys/tests/verific/README.md

# Verific Test Cases

## Disabled

- `bounds`: checks top and bottom bound attributes, which are removed to avoid OpenSTA issues
- `memory_semantics`: relies on initial values being retained, which we do not want
- `rom_case`: relies on using Verific's VHDL frontend rather than GHDL
Clean up Verific tests 2024-09-23 13:05:08 +02:00			`# Verific Test Cases`

Standardize convention, add back test, update README 2024-09-23 15:06:43 +02:00			`## Disabled`
Clean up Verific tests 2024-09-23 13:05:08 +02:00
			- `bounds`: checks top and bottom bound attributes, which are removed to avoid OpenSTA issues
Update Verific README 2024-09-23 14:35:48 +02:00			- `memory_semantics`: relies on initial values being retained, which we do not want
Update Verific 2024-10-03 08:09:36 +02:00			- `rom_case`: relies on using Verific's VHDL frontend rather than GHDL