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A schematic editor for VLSI/Asic/Analog custom designs, netlist backends for VHDL, Spice and Verilog. The tool is focused on hierarchy and parametric designs, to maximize circuit reuse.
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Stefan Frederik fe5d2efc59 fix false positive in double-free detection, reported by updated track_memory.awk; fix missing free on allocated string 2021-10-26 01:18:16 +02:00
XSchemWin scconfig test for dup2() availability 2021-10-25 01:53:00 +02:00
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scconfig code cleanup, comments, more globals in Xctx context structure 2021-10-25 17:05:43 +02:00
src fix false positive in double-free detection, reported by updated track_memory.awk; fix missing free on allocated string 2021-10-26 01:18:16 +02:00
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README.md

xschem

A schematic editor for VLSI/Asic/Analog custom designs, netlist backends for VHDL, Spice and Verilog. The tool is focused on hierarchy and parametric designs, to maximize circuit reuse.

Manual and instructions