luke
/
xschem
mirror of https://github.com/StefanSchippers/xschem.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity
A schematic editor for VLSI/Asic/Analog custom designs, netlist backends for VHDL, Spice and Verilog. The tool is focused on hierarchy and parametric designs, to maximize circuit reuse.
82 Commits 3 Branches 10 Tags 88 MiB
C 71.5%
Tcl 15.7%
Awk 8.2%
Roff 2%
Yacc 0.7%
Other 1.8%
Go to file
Stefan Schippers fde072720d enable "bus=true" attribute for lines as wellas for wires. As a side effect LCC schematics with bussed wires will display thick buses 2020-09-07 13:12:34 +02:00
XSchemWin Joanne fixes: in print_vhdl_primitive, set variable, format, from "vhdl_format" with get_tok_value before checking if its NULL, more work on windows port. 2020-08-10 23:43:20 +02:00
doc added command <Alt-b> (menu Symbol->Show only instance Bounding boxes) to toggle displaying instance detals / only bounding box. 2020-09-05 00:58:56 +02:00
scconfig removed unused files 2020-08-24 10:01:41 +02:00
src enable "bus=true" attribute for lines as wellas for wires. As a side effect LCC schematics with bussed wires will display thick buses 2020-09-07 13:12:34 +02:00
tests Joanne fixes: in print_vhdl_primitive, set variable, format, from "vhdl_format" with get_tok_value before checking if its NULL, more work on windows port. 2020-08-10 23:43:20 +02:00
xschem_library dash attribute for arcs 2020-09-02 23:59:58 +02:00
.gitignore changed .gitignore for specific xschem files 2020-08-08 23:25:43 +02:00
AUTHORS populating xschem git repo 2020-08-08 15:47:34 +02:00
COPYING populating xschem git repo 2020-08-08 15:47:34 +02:00
Changelog svg and pdf exports use custom layer colors as set in ~/.xschem/colors file if any. 2020-08-30 12:01:48 +02:00
INSTALL populating xschem git repo 2020-08-08 15:47:34 +02:00
LICENSE added LICENSE 2020-08-09 09:12:07 +02:00
Makefile populating xschem git repo 2020-08-08 15:47:34 +02:00
Makefile.conf.in populating xschem git repo 2020-08-08 15:47:34 +02:00
README populating xschem git repo 2020-08-08 15:47:34 +02:00
README.md Add manual link 2020-08-08 16:04:20 +02:00
config.h.in populating xschem git repo 2020-08-08 15:47:34 +02:00
configure populating xschem git repo 2020-08-08 15:47:34 +02:00

README.md

xschem

A schematic editor for VLSI/Asic/Analog custom designs, netlist backends for VHDL, Spice and Verilog. The tool is focused on hierarchy and parametric designs, to maximize circuit reuse. Manual and instructions: http://repo.hu/projects/xschem/xschem_man/xschem_man.html