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A schematic editor for VLSI/Asic/Analog custom designs, netlist backends for VHDL, Spice and Verilog. The tool is focused on hierarchy and parametric designs, to maximize circuit reuse.
43 Commits 3 Branches 10 Tags 87 MiB
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Tcl 15.7%
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Stefan Schippers d076952bff implemented text attributes "hcenter=true" (center text in reading direction) and "vcenter=true" (center text in direction perpendicular to reading direction). these can both be set for full centered text block. 2020-08-24 15:23:37 +02:00
XSchemWin Joanne fixes: in print_vhdl_primitive, set variable, format, from "vhdl_format" with get_tok_value before checking if its NULL, more work on windows port. 2020-08-10 23:43:20 +02:00
doc removed unused files 2020-08-24 10:01:41 +02:00
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src implemented text attributes "hcenter=true" (center text in reading direction) and "vcenter=true" (center text in direction perpendicular to reading direction). these can both be set for full centered text block. 2020-08-24 15:23:37 +02:00
tests Joanne fixes: in print_vhdl_primitive, set variable, format, from "vhdl_format" with get_tok_value before checking if its NULL, more work on windows port. 2020-08-10 23:43:20 +02:00
xschem_library removed unused files 2020-08-24 10:01:41 +02:00
.gitignore changed .gitignore for specific xschem files 2020-08-08 23:25:43 +02:00
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README.md

xschem

A schematic editor for VLSI/Asic/Analog custom designs, netlist backends for VHDL, Spice and Verilog. The tool is focused on hierarchy and parametric designs, to maximize circuit reuse. Manual and instructions: http://repo.hu/projects/xschem/xschem_man/xschem_man.html