A schematic editor for VLSI/Asic/Analog custom designs, netlist backends for VHDL, Spice and Verilog. The tool is focused on hierarchy and parametric designs, to maximize circuit reuse.

Go to file

stefan schippers c301a5ed67 increase debug level of some unimportant messages		2025-09-10 13:04:07 +02:00
.github/workflows	…
XSchemWin	…
doc	proc is_xschem_file: if symbol contains instances of "logo" or "launcher" type do not consider it as a schematic. add "xschem get_sym_type" command	2025-09-09 11:24:39 +02:00
scconfig	…
src	increase debug level of some unimportant messages	2025-09-10 13:04:07 +02:00
tests	…
xschem_library	add command "xschem attach_labels 2" to attach lab_show.sym on selected component with unconnected pins, add command "xschem show_unconnected_pins" to add to all instances, added also in Highlight menu	2025-09-07 13:06:47 +02:00
.gitignore	…
AUTHORS	…
CMakeLists.txt	…
Changelog	…
INSTALL	…
LICENSE	…
Makefile	…
Makefile.conf.in	…
README	…
README.md	…
README_MacOS.md	…
config.h.in	…
configure	…

README.md

xschem

A schematic editor for VLSI/Asic/Analog custom designs, netlist backends for VHDL, Spice and Verilog. The tool is focused on hierarchy and parametric designs, to maximize circuit reuse.

Manual and instructions