add command "xschem attach_labels 2" to attach lab_show.sym on selected component with unconnected pins, add command "xschem show_unconnected_pins" to add to all instances, added also in Highlight menu

This commit is contained in:
stefan schippers 2025-09-07 13:06:47 +02:00
parent 5b05164154
commit 458de325cc
7 changed files with 59 additions and 12 deletions

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@ -585,8 +585,10 @@ C {verilog_timescale.sym} 1050 -100 0 0 {name=s1 timestep="1ns" precision="1ns"
<li><kbd> arc</kbd></li><pre>
Start a GUI placement of an arc.
User should click 3 unaligned points to define the arc </pre>
<li><kbd> attach_labels</kbd></li><pre>
Attach net labels to selected component(s) instance(s) </pre>
<li><kbd> attach_labels [interactive]</kbd></li><pre>
Attach net labels to selected component(s) instance(s)
Optional integer 'interactive' (default: 0) is passed to attach_labels_to_inst().
setting interactive=2 will place lab_show.sym labels on unconnected instance pins </pre>
<li><kbd> bbox begin|end</kbd></li><pre>
Start/end bounding box calculation: parameter is either 'begin' or 'end' </pre>
<li><kbd> break_wires [remove]</kbd></li><pre>
@ -1562,6 +1564,8 @@ C {verilog_timescale.sym} 1050 -100 0 0 {name=s1 timestep="1ns" precision="1ns"
If 'val' not given (no attribute value) delete attribute from text
If '-fast' argument is given does not redraw and is not undoable
If '-fastundo' is given same as above but action is undoable.</pre>
<li><kbd> show_unconnected_pins</kbd></li><pre>
Add a "lab_show.sym" to all instance pins that are not connected to anything </pre>
<li><kbd> simulate [callback]</kbd></li><pre>
Run a simulation (start simulator configured as default in
Tools -&gt; Configure simulators and tools)
@ -1779,6 +1783,7 @@ C {verilog_timescale.sym} 1050 -100 0 0 {name=s1 timestep="1ns" precision="1ns"
</ul>

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@ -1282,7 +1282,10 @@ int unselect_partial_sel_wires(void)
}
/* interactive = 0: do not present dialog box
* interactive = 1: present dialog box
* interactive = 2: attach lab_show to unconnected pins, no dialog box
*/
void attach_labels_to_inst(int interactive) /* offloaded from callback.c 20171005 */
{
xSymbol *symbol;
@ -1294,6 +1297,7 @@ void attach_labels_to_inst(int interactive) /* offloaded from callback.c 201710
char *prop=NULL; /* 20161122 overflow safe */
char *symname_pin = NULL;
char *symname_wire = NULL;
char *symname_show = NULL;
char *type=NULL;
short dir;
int k,ii, skip;
@ -1310,7 +1314,8 @@ void attach_labels_to_inst(int interactive) /* offloaded from callback.c 201710
my_strdup(_ALLOC_ID_, &symname_pin, tcleval("find_file_first lab_pin.sym"));
my_strdup(_ALLOC_ID_, &symname_wire, tcleval("find_file_first lab_wire.sym"));
if(symname_pin && symname_wire) {
my_strdup(_ALLOC_ID_, &symname_show, tcleval("find_file_first lab_show.sym"));
if(symname_pin && symname_wire && symname_show) {
rebuild_selected_array();
k = xctx->lastsel;
first_call=1;
@ -1321,7 +1326,7 @@ void attach_labels_to_inst(int interactive) /* offloaded from callback.c 201710
my_strcat(_ALLOC_ID_, &prop, "_");
tclsetvar("custom_label_prefix",prop);
if(interactive && !do_all_inst) {
if(interactive == 1 && !do_all_inst) {
dbg(1,"attach_labels_to_inst(): invoking tcl attach_labels_to_inst\n");
tcleval("attach_labels_to_inst");
if(!strcmp(tclgetvar("tctx::rcode"),"") ) {
@ -1330,7 +1335,7 @@ void attach_labels_to_inst(int interactive) /* offloaded from callback.c 201710
return;
}
}
if(interactive == 0 ) {
if(interactive != 1 ) {
tclsetvar("tctx::rcode", "yes");
tclsetvar("use_lab_wire", "0");
tclsetvar("use_label_prefix", "0");
@ -1418,7 +1423,9 @@ void attach_labels_to_inst(int interactive) /* offloaded from callback.c 201710
} else {
rot1=(short)((rot+rotated_text)%4); /* 20111103 20171208 text_rotation */
}
if(!tclgetboolvar("use_lab_wire")) {
if(interactive == 2) {
place_symbol(-1,symname_show, pinx0, piny0, rot1, dir, prop, 2, first_call, 1/*to_push_undo*/);
} else if(!tclgetboolvar("use_lab_wire")) {
place_symbol(-1,symname_pin, pinx0, piny0, rot1, dir, prop, 2, first_call, 1/*to_push_undo*/);
} else {
place_symbol(-1,symname_wire, pinx0, piny0, rot1, dir, prop, 2, first_call, 1/*to_push_undo*/);
@ -1443,8 +1450,14 @@ void attach_labels_to_inst(int interactive) /* offloaded from callback.c 201710
fprintf(errfp, "attach_labels_to_inst(): location of schematic labels not found\n");
tcleval("alert_ {attach_labels_to_inst(): location of schematic labels not found} {}");
}
/* if hilights are present in schematic propagate to new added labels */
if(xctx->hilight_nets) {
propagate_hilights(1, 0, XINSERT_NOREPLACE);
redraw_hilights(0);
}
my_free(_ALLOC_ID_, &symname_pin);
my_free(_ALLOC_ID_, &symname_wire);
my_free(_ALLOC_ID_, &symname_show);
}
void delete_files(void)

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@ -1539,6 +1539,19 @@ static int reset_node_data_and_rehash()
return err;
}
/* add lab_show.sym to instance pins that are not connected to wires / labels / other instances */
void show_unconnected_pins(void)
{
int i;
for(i = 0; i < xctx->instances; ++i)
{
select_element(i, SELECTED, 1, 0);
}
rebuild_selected_array();
attach_labels_to_inst(2);
unselect_all(1);
}
int prepare_netlist_structs(int for_netl)
{
int err = 0;

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@ -377,12 +377,17 @@ int xschem(ClientData clientdata, Tcl_Interp *interp, int argc, const char * arg
xctx->ui_state2 = MENUSTARTARC;
}
/* attach_labels
* Attach net labels to selected component(s) instance(s) */
/* attach_labels [interactive]
* Attach net labels to selected component(s) instance(s)
* Optional integer 'interactive' (default: 0) is passed to attach_labels_to_inst().
* setting interactive=2 will place lab_show.sym labels on unconnected instance pins */
else if(!strcmp(argv[1], "attach_labels"))
{
int interactive = 0;
if(!xctx) {Tcl_SetResult(interp, not_avail, TCL_STATIC); return TCL_ERROR;}
attach_labels_to_inst(0);
if(argc > 2) interactive = atoi(argv[2]);
attach_labels_to_inst(interactive);
Tcl_ResetResult(interp);
}
else { cmd_found = 0;}
@ -5828,6 +5833,14 @@ int xschem(ClientData clientdata, Tcl_Interp *interp, int argc, const char * arg
Tcl_ResetResult(interp);
}
}
/* show_unconnected_pins
* Add a "lab_show.sym" to all instance pins that are not connected to anything */
else if(!strcmp(argv[1], "show_unconnected_pins") )
{
if(!xctx) {Tcl_SetResult(interp, not_avail, TCL_STATIC); return TCL_ERROR;}
show_unconnected_pins();
Tcl_ResetResult(interp);
}
/* simulate [callback]
* Run a simulation (start simulator configured as default in
* Tools -> Configure simulators and tools)

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@ -1753,6 +1753,7 @@ extern void copy_hilights(void);
extern void display_hilights(int what, char **str);
extern void redraw_hilights(int clear);
extern void set_tcl_netlist_type(void);
extern void show_unconnected_pins(void);
extern int prepare_netlist_structs(int for_netlist);
extern int skip_instance(int i, int skip_short, int lvs_ignore);
extern int shorted_instance(int i, int lvs_ignore);

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@ -9387,6 +9387,8 @@ proc build_widgets { {topwin {} } } {
$topwin.menubar.hilight add command -label {Un-highlight selected net/pins} \
-command "xschem unhilight" -accelerator Ctrl+K
# 20160413
$topwin.menubar.hilight add command -label {Show labels on unconnected instance pins} \
-command "xschem show_unconnected_pins"
$topwin.menubar.hilight add checkbutton \
-selectcolor $selectcolor -label {Auto-highlight net/pins} -variable auto_hilight
$topwin.menubar.hilight add checkbutton -label {Enable highlight connected instances} \

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@ -27,6 +27,6 @@ V {}
S {}
F {}
E {}
L 4 -20 -20 0 0 {}
L 4 -20 -10 0 0 {}
B 5 -1.25 -1.25 1.25 1.25 {name=p dir=none}
T {@#0:net_name} -22.5 -30.625 0 1 0.33 0.33 {}
T {@#0:net_name} -22.5 -20.625 0 1 0.33 0.33 {}