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A schematic editor for VLSI/Asic/Analog custom designs, netlist backends for VHDL, Spice and Verilog. The tool is focused on hierarchy and parametric designs, to maximize circuit reuse.
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stefan schippers 5e3445a80e implement xschem sch_pinlist command, improve xschem pinlist inst [attr], improve make_sym.awk (no trailing spaces in pin attributes) 2023-04-08 13:19:49 +02:00
XSchemWin Make joanne fix for SPICE_DATA preprocessor macro comparison apply for unix as well 2023-02-27 22:32:28 +01:00
doc implement xschem sch_pinlist command, improve xschem pinlist inst [attr], improve make_sym.awk (no trailing spaces in pin attributes) 2023-04-08 13:19:49 +02:00
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src implement xschem sch_pinlist command, improve xschem pinlist inst [attr], improve make_sym.awk (no trailing spaces in pin attributes) 2023-04-08 13:19:49 +02:00
tests Doc updates (sim_pinnumber), example circuits update 2022-10-17 12:45:48 +02:00
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README.md

xschem

A schematic editor for VLSI/Asic/Analog custom designs, netlist backends for VHDL, Spice and Verilog. The tool is focused on hierarchy and parametric designs, to maximize circuit reuse.

Manual and instructions