A schematic editor for VLSI/Asic/Analog custom designs, netlist backends for VHDL, Spice and Verilog. The tool is focused on hierarchy and parametric designs, to maximize circuit reuse.

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stefan schippers 4b9f61612b symbol generators may now take attributes like: "mosgen( @model )", with @model expanded to instance (or symbol template) value. update_symbol() updated to reflect this change.		2023-05-02 17:49:44 +02:00
XSchemWin	persistent load file dialog (Shift-Insert) now correctly handles generator script selection (do nothing until user adds () or (param1,param2,...) to generator name).	2023-04-29 00:28:24 +02:00
doc	persistent load file dialog (Shift-Insert) now correctly handles generator script selection (do nothing until user adds () or (param1,param2,...) to generator name).	2023-04-29 00:28:24 +02:00
scconfig	change preprocessor defined(HAS_CAIRO) to HAS_CAIRO==1	2023-04-09 15:36:06 +02:00
src	symbol generators may now take attributes like: "mosgen( @model )", with @model expanded to instance (or symbol template) value. update_symbol() updated to reflect this change.	2023-05-02 17:49:44 +02:00
tests	Doc updates (sim_pinnumber), example circuits update	2022-10-17 12:45:48 +02:00
xschem_library	symbol generators may now take attributes like: "mosgen( @model )", with @model expanded to instance (or symbol template) value. update_symbol() updated to reflect this change.	2023-05-02 17:49:44 +02:00
.gitignore	gitignore update	2023-01-16 13:41:16 -07:00
AUTHORS	update copyright info to 2021; update Product.wxs	2021-09-12 08:32:16 +02:00
CMakeLists.txt	Added png and embedded graphs to ps and pdf export	2023-01-15 21:34:43 -07:00
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Makefile	populating xschem git repo	2020-08-08 15:47:34 +02:00
Makefile.conf.in	added libjpeg detection code, so postscript image embedding will be disabled if libjpeg not present	2023-01-18 03:33:28 +01:00
README	update license info	2021-07-27 16:42:54 +02:00
README.md	Update README.md	2020-10-08 00:54:06 +02:00
README_MacOS.md	added notes for MacOS 'Big Sur' builds.	2021-09-26 13:24:51 +02:00
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README.md

xschem

A schematic editor for VLSI/Asic/Analog custom designs, netlist backends for VHDL, Spice and Verilog. The tool is focused on hierarchy and parametric designs, to maximize circuit reuse.

Manual and instructions