A schematic editor for VLSI/Asic/Analog custom designs, netlist backends for VHDL, Spice and Verilog. The tool is focused on hierarchy and parametric designs, to maximize circuit reuse.

Go to file

Stefan Frederik 3573fcdafb redraw / update all nodes that might change in copy/move operations if net_name=true		2021-09-24 00:39:56 +02:00
XSchemWin	update copyright info to 2021; update Product.wxs	2021-09-12 08:32:16 +02:00
doc	documentation update about tcleval(...) tcl substitution of attributes by get_tok_value()	2021-09-20 01:57:04 +02:00
scconfig	poweramp.sch fixes in sim commands	2021-07-13 18:37:01 +02:00
src	redraw / update all nodes that might change in copy/move operations if net_name=true	2021-09-24 00:39:56 +02:00
tests	update license info	2021-07-27 16:42:54 +02:00
xschem_library	added spice waveform template configuration for Analog Flavor`s bespice wave (bspwave)	2021-09-16 18:07:12 +02:00
.gitignore	changed .gitignore for specific xschem files	2020-08-08 23:25:43 +02:00
AUTHORS	update copyright info to 2021; update Product.wxs	2021-09-12 08:32:16 +02:00
COPYING	populating xschem git repo	2020-08-08 15:47:34 +02:00
Changelog	bump version to 3.0.0; prepare for 3.0.0 release	2021-09-11 07:53:11 +02:00
INSTALL	populating xschem git repo	2020-08-08 15:47:34 +02:00
LICENSE	update license info	2021-07-27 16:42:54 +02:00
Makefile	populating xschem git repo	2020-08-08 15:47:34 +02:00
Makefile.conf.in	populating xschem git repo	2020-08-08 15:47:34 +02:00
README	update license info	2021-07-27 16:42:54 +02:00
README.md	Update README.md	2020-10-08 00:54:06 +02:00
README_MacOS.md	Update README_MacOS.md	2021-05-03 20:56:10 +00:00
config.h.in	better comments in config.h.in	2020-10-28 00:23:26 +01:00
configure	populating xschem git repo	2020-08-08 15:47:34 +02:00

README.md

xschem

A schematic editor for VLSI/Asic/Analog custom designs, netlist backends for VHDL, Spice and Verilog. The tool is focused on hierarchy and parametric designs, to maximize circuit reuse.

Manual and instructions