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A schematic editor for VLSI/Asic/Analog custom designs, netlist backends for VHDL, Spice and Verilog. The tool is focused on hierarchy and parametric designs, to maximize circuit reuse.
524 Commits 3 Branches 10 Tags 86 MiB
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Stefan Frederik 1c19976ff5 dont break .inc in addition to .include lines 2021-01-24 04:19:52 +01:00
XSchemWin delete(): clear lab_show.sym symbols if nets get unhilight after wire deletion 2021-01-08 05:26:37 +01:00
doc removed/updated obsolete keybinding descriptions, removed status check on Delete key events 2021-01-13 13:44:57 +01:00
scconfig fix a bug when pasting / ctrl-v into an empty schematic (instances not selected for moving) 2021-01-22 01:03:16 +01:00
src dont break .inc in addition to .include lines 2021-01-24 04:19:52 +01:00
tests redraw wire/line/rect/arc/poly rubbers after changing zoom/panning; do not wait for Motion events 2020-12-29 03:45:12 +01:00
xschem_library new_wire(): update connecting bubbles when inserting new wires and no one is highlighted 2021-01-19 13:32:45 +01:00
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Changelog fix regression due to r1395, updated Changelog, fix set initial window size when doing ps/pdf export from cli 2020-12-17 03:48:34 +01:00
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README.md

xschem

A schematic editor for VLSI/Asic/Analog custom designs, netlist backends for VHDL, Spice and Verilog. The tool is focused on hierarchy and parametric designs, to maximize circuit reuse.

Manual and instructions