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A schematic editor for VLSI/Asic/Analog custom designs, netlist backends for VHDL, Spice and Verilog. The tool is focused on hierarchy and parametric designs, to maximize circuit reuse.
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Stefan Frederik 118e937e7f flatten.awk: derive element pattern list ^[EGHFCMDQRGIV] from nodes[] array, to facilitate addition of new devices. 2022-10-10 15:36:50 +02:00
XSchemWin refactoring of netlister code 2022-10-07 23:29:42 +02:00
doc doc updates about new expandlabel AAA[0:1:3:4] 2022-10-05 02:30:14 +02:00
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src flatten.awk: derive element pattern list ^[EGHFCMDQRGIV] from nodes[] array, to facilitate addition of new devices. 2022-10-10 15:36:50 +02:00
tests netlister code rewrite to allow any combination of pass-through symbols 2022-10-10 14:54:32 +02:00
xschem_library netlister code rewrite to allow any combination of pass-through symbols 2022-10-10 14:54:32 +02:00
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AUTHORS update copyright info to 2021; update Product.wxs 2021-09-12 08:32:16 +02:00
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README_MacOS.md added notes for MacOS 'Big Sur' builds. 2021-09-26 13:24:51 +02:00
config.h.in remove all xrender and all xcb code, remove detection as well. Fix a couple of potentially uninitialized variables 2022-01-19 00:49:46 +01:00
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README.md

xschem

A schematic editor for VLSI/Asic/Analog custom designs, netlist backends for VHDL, Spice and Verilog. The tool is focused on hierarchy and parametric designs, to maximize circuit reuse.

Manual and instructions