Stefan Frederik
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dcb37ef295
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added devices/rnmos4.sym for enhancement load nmos gate simulation in verilog, updated test_mos_verilog.sch example
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2021-12-01 14:25:27 +01:00 |
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Stefan Frederik
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0e91351e4a
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fix depletion mos example
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2021-11-21 01:18:12 +01:00 |
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Stefan Frederik
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64586f0c2d
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depletion nmos transistor drawn with drain side low as this is the way it is used
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2021-11-21 00:02:48 +01:00 |
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Stefan Frederik
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10114ec838
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add missing braces in update recent file submenu, fix file selector improperly setting main window title, added logic/test_mos_verilog.sch depletion mode verilog example
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2021-11-20 23:44:19 +01:00 |