3 Commits

Author	SHA1	Message	Date
Stefan Schippers	e6fe276eba	undo test-changes in example schematics	2020-09-02 13:16:54 +02:00
Stefan Schippers	9f82cf47aa	verilog_ignore, spice_ignore, vhdl_ignore attributes on schematic pins are propagated to symbol pin attributes (if using make symbol from schematic, otherwise propagate by hand). These pins are not netlisted in the respective netlist format	2020-09-02 12:30:52 +02:00
Stefan SChippers	5e8df730a0	populating xschem git repo	2020-08-08 15:47:34 +02:00