Árpád Bűrmen
|
746fd66d90
|
Updated devices/*.sym with VACASK syntax (where applicable).
|
2025-08-18 12:10:04 +02:00 |
stefan schippers
|
20359ed43e
|
update license info. Remove unneeded newline saving in version line of .sch/.sym files, remove c89 flag based on lib versions
|
2024-11-12 20:23:18 +01:00 |
|
stefan schippers
|
9c750b5044
|
add @#pin:spice_get_voltage attribute for pin texts that displays voltage of net attached to pin. remove net_name=... attributes from symbols and instance global attributes since it is no more used. set default value for show_pin_net_names to 1.
|
2024-05-02 10:32:12 +02:00 |
|
stefan schippers
|
94bccc08d9
|
do not duplicate empty strings as NULLs in hash tables
|
2023-10-09 12:49:11 +02:00 |
|
Stefan Frederik
|
756a7ba06d
|
swap s/d in verilog netlisting rule for enhancement load "rnmos4.sym" so it can be used as usually done with nmos devices (drain side up) .
|
2021-12-01 15:53:14 +01:00 |
|
Stefan Frederik
|
dcb37ef295
|
added devices/rnmos4.sym for enhancement load nmos gate simulation in verilog, updated test_mos_verilog.sch example
|
2021-12-01 14:25:27 +01:00 |