From a9a0baa3fa659fc46aa0ec47f7dd370df0cb75cc Mon Sep 17 00:00:00 2001
From: Stefan Frederik <stefan.schippers@gmail.com>
Date: Tue, 24 Nov 2020 02:59:14 +0100
Subject: [PATCH] comments in sample schematic

---
 xschem_library/pcb/hierarchical_tedax.sch | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/xschem_library/pcb/hierarchical_tedax.sch b/xschem_library/pcb/hierarchical_tedax.sch
index d2ded6e6..78a182db 100644
--- a/xschem_library/pcb/hierarchical_tedax.sch
+++ b/xschem_library/pcb/hierarchical_tedax.sch
@@ -7,7 +7,11 @@ E {}
 T {Example of hierarchical schematic
 to be netlisted in tEDAx format.
 Hierarchy is flattened and hierarchical 
-node names are mangled to avoid collisions.} 1330 -520 0 0 0.8 0.8 {}
+node names and refdes's are mangled to 
+avoid collisions.} 1330 -520 0 0 0.8 0.8 {}
+T {NOTE: circuit is doing nothing useful,
+just a collection of schematics to show
+hierarchical tEDAx netlisting} 1330 -220 0 0 0.8 0.8 {}
 N 540 -100 540 -80 {lab=VSS}
 N 540 -200 540 -160 {lab=VREF}
 N 540 -200 630 -200 {lab=VREF}