2023-10-09 12:49:11 +02:00
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v {xschem version=3.4.4 file_version=1.2
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*
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* This file is part of XSCHEM,
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* a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit
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* simulation.
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2024-11-12 20:23:18 +01:00
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* Copyright (C) 1998-2024 Stefan Frederik Schippers
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2023-10-09 12:49:11 +02:00
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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}
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2020-08-08 15:47:34 +02:00
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G {}
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V {}
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S {}
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E {}
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N 220 -470 260 -470 {lab=SET_BAR}
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N 220 -290 260 -290 {lab=CLEAR_BAR}
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N 360 -450 390 -450 {lab=Q}
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N 360 -310 390 -310 {lab=QBAR}
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N 260 -430 260 -410 {lab=QBAR}
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N 260 -410 360 -360 {lab=QBAR}
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N 360 -360 360 -310 {lab=QBAR}
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N 260 -350 260 -330 {lab=Q}
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N 260 -350 360 -400 {lab=Q}
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N 360 -450 360 -400 {lab=Q}
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C {nand2.sym} 310 -450 0 0 {name=x1}
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C {lab_pin.sym} 390 -450 0 1 {name=p1 lab=Q}
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C {lab_pin.sym} 220 -470 0 0 {name=p2 lab=SET_BAR}
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C {lab_pin.sym} 220 -290 0 0 {name=p3 lab=CLEAR_BAR}
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C {nand2.sym} 310 -310 2 1 {name=x2}
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C {lab_pin.sym} 390 -310 0 1 {name=p4 lab=QBAR}
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