2020-08-08 15:47:34 +02:00
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<!DOCTYPE html>
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<html>
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<head>
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<title>XSCHEM PRESENTATION</title>
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<link rel="stylesheet" type="text/css" href="xschem_man.css" />
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<style type="text/css">
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/* Local styling goes here */
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p{padding: 15px 30px 10px;}
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.content{ background-image:url('xschem_bg2.png');}
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th,td {font-size: 60%;padding: 3px;}
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</style>
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</head>
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<body>
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<!-- start of slide -->
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<div class="content">
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<a href="tutorial_xschem_slides07.html" class="prev">PREV</a>
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<!-- slide title -->
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<h1>SIMULATION</h1>
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<h3 style="text-align:left; max-width: 60%;margin-left:0;">
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<ul style="margin-left:0;">
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<li>In XSCHEM a schematic usually contains all the details needed to run a simulation.</li>
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<li> When a schematic is correctly drawn just generate the netlist pushing the Netlist button, and then start simulation
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by pressing the Simulate button.</li>
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<li> XSCHEM has bindings to waveform viewers as well as simulators. Press the Waves button after simulation
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is completed to view the results.<br>
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<table style="float: left;margin-top:10px;margin-bottom: 10px;">
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<tr><th>TOOL</th><th>TYPE</th><th>XSCHEM<br>SUPPORT</th></tr>
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<tr><td>ngspice</td><td>Simulator</td><td>Works</td></tr>
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<tr><td>Xyce</td><td>Parallel<br>Simulator</td><td>Works</td></tr>
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<tr><td>Icarus Verilog</td><td>Simulator</td><td>Works</td></tr>
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<tr><td>GHDL</td><td>Simulator</td><td>Works</td></tr>
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<tr><td>ModelSim</td><td>Proprietary<br>Simulator</td><td>Works</td></tr>
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<tr><td>NcSim</td><td>Proprietary<br>Simulator</td><td>Works</td></tr>
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</table>
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<table style="float: left;margin-top:10px;margin-bottom: 10px;">
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<tr><th>TOOL</th><th>TYPE</th><th>XSCHEM<br>SUPPORT</th></tr>
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<tr><td>Hspice</td><td>Proprietary<br>Simulator</td><td>Works</td></tr>
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<tr><td>Finesim</td><td>Proprietary<br>Simulator</td><td>Works</td></tr>
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<tr><td>Gtkwave</td><td>Viewer</td><td>Works</td></tr>
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<tr><td>Gaw</td><td>Viewer</td><td>Works</td></tr>
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<tr><td>Waveview</td><td>Proprietary<br>Viewer</td><td>Works</td></tr>
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</table>
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</li>
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<li style="clear: both;"> With proper netlisting attributes on leaf cells the same design can be simulated unchanged in Spice, Verilog, VHDL.
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<li> DC Operating point information back-annotation into the schematic is possible.</li>
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</ul>
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</h3>
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2021-10-13 17:23:05 +02:00
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<img src="tutorial_xschem_slides07.png" style="position:fixed; top:15%; right:6%; max-width: 35%;" width="640">
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<img src="tutorial_xschem_slides13.png" style="border: 4px solid grey;position:fixed; top:50%; right:2%; max-width: 25%;" width="640">
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2020-08-08 15:47:34 +02:00
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<!-- end of slide -->
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<div class="filler"></div>
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</div>
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<iframe seamless src="xschem_footer.html" class="footer_iframe" >
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