Veripool API Bot
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ce4d35aa85
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Verilog format
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2026-03-03 07:21:24 -05:00 |
Wilson Snyder
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7c6c6a684b
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Add SPDX copyright identifiers, and get 'reuse' clean. No functional change.
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2026-01-26 20:24:34 -05:00 |
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Wilson Snyder
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b10c6293d9
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Fix elaboration displays with `%m` (#6445).
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2025-09-16 20:50:15 -04:00 |
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Wilson Snyder
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91d138248d
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Tests: Favor all caps for tests' parameters. No test change.
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2025-08-29 18:33:14 -04:00 |
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Wilson Snyder
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1ce360ed5b
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Add SPDX license identifiers. No functional change.
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2020-03-21 11:24:24 -04:00 |
Johan Bjork
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65be2448dc
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Fix elaboration-time display warnings, bug1032.
Signed-off-by: Wilson Snyder <wsnyder@wsnyder.org>
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2016-02-04 18:38:59 -05:00 |
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Wilson Snyder
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4fde6ee7af
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Support elaboration assertions, bug973.
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2015-10-23 18:13:25 -04:00 |