4 Commits

Author	SHA1	Message	Date
Wilson Snyder	1653b982b9	Verilog format	2026-05-13 21:00:34 -04:00
Wilson Snyder	ba194f3790	Tests: Avoid implied static variables, to avoid future warning	2026-02-08 18:20:28 -05:00
Wilson Snyder	7c6c6a684b	Add SPDX copyright identifiers, and get 'reuse' clean. No functional change.	2026-01-26 20:24:34 -05:00
Igor Zaworski	96ed725278	Support `case` impure expressions (#6563)	2025-10-17 09:00:32 -04:00