28 lines
915 B
Python
28 lines
915 B
Python
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#!/usr/bin/env python3
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# DESCRIPTION: Verilator: Verilog Test driver/expect definition
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#
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# Copyright 2025 by Wilson Snyder. This program is free software; you
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# can redistribute it and/or modify it under the terms of either the GNU
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# Lesser General Public License Version 3 or the Perl Artistic License
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# Version 2.0.
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# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
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import vltest_bootstrap
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test.scenarios('simulator')
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test.top_filename = "t/t_instrumentation.v"
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sim_filename = "t/" + test.name + ".cpp"
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dpi_filename = "t/t_instrumentationDPI.cpp"
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vlt_filename = "t/" + test.name + ".vlt"
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log_filename = "obj_vlt/t_instrumentation/simulation_output.log"
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test.compile(make_top_shell=False,
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make_main=False,
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v_flags2=["--trace --exe --instrument", sim_filename, vlt_filename, dpi_filename])
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test.execute()
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test.files_identical(log_filename, test.golden_filename)
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test.passes()
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