sv2v/src/Language/SystemVerilog/AST
Zachary Snow e2570303d0 reject negative repeat counts 2019-09-30 23:11:16 -04:00
..
Attr.hs surprisingly non-disgusting addition of attribute instances to module items and statements 2019-03-26 01:54:16 -04:00
Decl.hs major array pack and flatten update (closes #48) 2019-09-26 23:11:59 -04:00
Description.hs support for module attributes (resolves #39) 2019-09-15 23:17:14 -04:00
Expr.hs reject negative repeat counts 2019-09-30 23:11:16 -04:00
GenItem.hs support for statement labels and basic fork-join 2019-09-30 23:03:55 -04:00
LHS.hs language support for LHS streaming operators 2019-09-02 20:46:35 -04:00
ModuleItem.hs language support for parameter type bindings 2019-09-09 07:38:14 +02:00
ModuleItem.hs-boot final major round of splitting and cleanup in the SystemVerilog module 2019-04-03 20:24:09 -04:00
Op.hs support and conversion for -> and <-> 2019-09-15 13:55:40 -04:00
ShowHelp.hs added support and conversion handling of the $bits system function 2019-04-02 00:16:09 -04:00
Stmt.hs support for statement labels and basic fork-join 2019-09-30 23:03:55 -04:00
Type.hs allow typename resolution of non-vector types 2019-09-25 23:45:18 -04:00
Type.hs-boot starting work to clean up and segment AST 2019-03-22 19:39:28 -04:00