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Zachary Snow
3eefd03c8d
- general refactoring in decl parsing - restrict charge strength to trireg - require const vars to be initialized - forbid const net declarations - disallow run-on declarations in packages and classes
5 lines
115 B
Systemverilog
5 lines
115 B
Systemverilog
// pattern: decl_const_wire\.sv:3:5: Parse error: wire cannot be const
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module top;
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const wire x = 1;
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endmodule
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