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Zachary Snow
96a108ded7
- fold string literal comparisons - fold non-decimal bit shifts - fold non-decimal integer comparisons - fold decimal bitwise AND and OR - simplify cast expressions before elaboration - remove duplicate cast expression traversal - flatten concatenated numbers in a single pass
2 lines
22 B
Verilog
2 lines
22 B
Verilog
module top; endmodule
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