mirror of https://github.com/zachjs/sv2v.git
faster test runner pattern matching
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@ -56,16 +56,22 @@ assertConverts() {
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assertTrue "conversion of $ac_file not stable after the first iteration" $?
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$SV2V -v $ac_file 2> /dev/null > /dev/null
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assertTrue "verbose conversion of $ac_file failed" $?
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# using sed to remove quoted strings
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filtered=`sed -E 's/"([^"]|\")+"//g' $ac_tmpa`
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# using sed to remove quoted strings and integer unsigned
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filtered=`sed -E -e 's/"([^"]|\")+"//g' -e 's/integer unsigned/integer/g' $ac_tmpa`
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# check for various things iverilog accepts which we don't want to output
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PATTERNS="\$bits\|\$dimensions\|\$unpacked_dimensions\|\$left\|\$right\|\$low\|\$high\|\$increment\|\$size"
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echo "$filtered" | grep "$PATTERNS" > /dev/null
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assertFalse "conversion of $ac_file still contains dimension queries" $?
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echo "$filtered" | egrep "\s(int\|bit\|logic\|byte\|struct\|enum\|longint\|shortint)\s"
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assertFalse "conversion of $ac_file still contains SV types" $?
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echo "$filtered" | grep "[^\$a-zA-Z_]unsigned" | grep -v "integer unsigned" > /dev/null
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assertFalse "conversion of $ac_file still contains unsigned keyword" $?
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prefix="conversion of $ac_file still contains"
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assertNotMatch "$filtered" "$prefix dimension queries" \
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'\$bits|\$dimensions|\$unpacked_dimensions|\$left|\$right|\$low|\$high|\$increment|\$size'
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assertNotMatch "$filtered" "$prefix SystemVerilog types" \
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'[[:space:]](int|bit|logic|byte|struct|enum|longint|shortint)[[:space:]]'
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assertNotMatch "$filtered" "$prefix unsigned keyword" \
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'[^\$a-zA-Z_]unsigned'
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}
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assertNotMatch() {
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if [[ "$1" =~ $3 ]]; then
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fail "$2"
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fi
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}
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# convert SystemVerilog source file(s)
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